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path: root/llvm/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
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* sink the arm implementations of ASmPrinter and MCInstLowerChris Lattner2010-07-191-1438/+0
| | | | | | | | out of the AsmPrinter directory into libarm. Now the ARM InstPrinters depend jsut on the MC stuff, not on vmcore or codegen. llvm-svn: 108783
* Split -enable-finite-only-fp-math to two options:Evan Cheng2010-07-151-1/+1
| | | | | | -enable-no-nans-fp-math and -enable-no-infs-fp-math. All of the current codegen fp math optimizations only care whether the fp arithmetics arguments and results can never be NaN. llvm-svn: 108465
* Remove restriction on NEON alignment values. Some of the NEON ld/stBob Wilson2010-07-141-5/+1
| | | | | | | instructions use different values (e.g., 2-byte or 4-byte alignment). Also fix ARMInstPrinter to print these alignments as bits instead of bytes. llvm-svn: 108386
* Move NEON "modified immediate" encode/decode into ARMAddressingModes.h toBob Wilson2010-07-131-29/+3
| | | | | | avoid replicated code. llvm-svn: 108227
* Convert some tab stops into spaces.Duncan Sands2010-07-121-4/+4
| | | | llvm-svn: 108130
* Print "dregpair" NEON operands with a space between them, for readability andBob Wilson2010-07-091-1/+1
| | | | | | consistency with other instructions that have lists of register operands. llvm-svn: 107944
* Represent NEON load/store alignments in bytes, not bits.Bob Wilson2010-07-061-1/+5
| | | | llvm-svn: 107701
* Fix incorrect asm-printing of some NEON immediates. Fix weak testcase soBob Wilson2010-07-021-2/+2
| | | | | | | that it checks the immediate values, not just the instructions opcodes. Radar 8110263. llvm-svn: 107487
* Add instruction encoding for the Neon VMOV immediate instruction. This changesBob Wilson2010-06-111-17/+36
| | | | | | | | | | | the machine instruction representation of the immediate value to be encoded into an integer with similar fields as the actual VMOV instruction. This makes things easier for the disassembler, since it can just stuff the bits into the immediate operand, but harder for the asm printer since it has to decode the value to be printed. Testcase for the encoding will follow later when MC has more support for ARM. llvm-svn: 105836
* Use report_fatal_error, not llvm_unreachable.Evan Cheng2010-05-271-1/+1
| | | | llvm-svn: 104899
* llvm can't correctly support 'H', 'Q' and 'R' modifiers. Just mark it an error.Evan Cheng2010-05-271-18/+2
| | | | llvm-svn: 104891
* Fix some bad fall-throughs in a switch statement. Both the 'Q' and 'R' casesBob Wilson2010-05-271-11/+17
| | | | | | | should fall through to the 'H' case, but instead 'Q' was falling through to 'R' so that it would do the wrong thing for a big-endian ARM target. llvm-svn: 104883
* Use enums instead of literals in the ARM backend.Jakob Stoklund Olesen2010-05-251-2/+2
| | | | llvm-svn: 104573
* Switch ARMRegisterInfo.td to use SubRegIndex and eliminate the parallel enumsJakob Stoklund Olesen2010-05-241-2/+2
| | | | | | from ARMRegisterInfo.h llvm-svn: 104508
* Add support for movi32 of global values to the new (MC) asm printer.Rafael Espindola2010-05-121-4/+23
| | | | llvm-svn: 103576
* Handle target-specific form of DBG_VALUE in AsmPrinter.Dale Johannesen2010-04-261-0/+19
| | | | llvm-svn: 102373
* Add const qualifiers to TargetLoweringObjectFile usage.Dan Gohman2010-04-171-4/+5
| | | | llvm-svn: 101640
* In the same spirit of r101524, which removed the assert() from ↵Johnny Chen2010-04-161-1/+0
| | | | | | | | printAddrMode2OffsetOperand(), this patch removes the assert() from printAddrMode3OffsetOperand() and adds a test case. llvm-svn: 101529
* Remove the assert() from printAddrMode2OffsetOperand(). "#0 and #-0" areJohnny Chen2010-04-161-1/+0
| | | | | | | | | considered legal instructions. Refs: A8.6.51 LDC, LDC2 (immediate) -- page A8-107, A8.6.58 LDR (immediate, ARM) -- page A8-121, and A8.6.194 STR (immediate, ARM) -- page A8-395. llvm-svn: 101524
* Add const qualifiers to CodeGen's use of LLVM IR constructs.Dan Gohman2010-04-151-2/+2
| | | | llvm-svn: 101334
* remove the TargetLoweringObjectFileMachO::getMachoSectionChris Lattner2010-04-081-6/+6
| | | | | | api and update clients to use MCContext instead. llvm-svn: 100808
* don't use emitlabel in the arm asm printer yet, the order Chris Lattner2010-04-051-2/+7
| | | | | | | isn't well specified. ARM really needs to have its instprinter finished at some point. llvm-svn: 100439
* fix a couple problems I introduced handling symbolsChris Lattner2010-04-051-4/+10
| | | | | | with spaces in them. Sym->getName() != OS << *Sym llvm-svn: 100434
* just have all targets create the DwarfWriter.Chris Lattner2010-04-051-6/+0
| | | | llvm-svn: 100377
* simplify various getAnalysisUsage implementations.Chris Lattner2010-04-051-2/+0
| | | | llvm-svn: 100376
* clean up the asmprinter header and privatize some stuff.Chris Lattner2010-04-041-5/+5
| | | | llvm-svn: 100342
* remove TargetMachine.h #include, also, TRI isn't used frequently Chris Lattner2010-04-041-4/+5
| | | | | | enough to warrant caching in AsmPrinter, so remove it. llvm-svn: 100336
* Momentous day: remove the "O" member from AsmPrinter. Now all Chris Lattner2010-04-041-6/+3
| | | | | | | | | | "asm printering" happens through MCStreamer. This also Streamerizes PIC16 debug info, which escaped my attention. This removes a leak from LLVMTargetMachine of the 'legacy' output stream. llvm-svn: 100327
* mcize a bunch more stuff, using EmitRawText for things weChris Lattner2010-04-041-26/+38
| | | | | | don't have mcstreamer support for yet. llvm-svn: 100319
* convert the non-MCInstPrinter'ized EmitInstruction Chris Lattner2010-04-041-14/+14
| | | | | | | implementations to use EmitRawText instead of writing directly to "O". llvm-svn: 100318
* fix PrintAsmOperand and PrintAsmMemoryOperand to pass down Chris Lattner2010-04-041-4/+7
| | | | | | raw_ostream to print to. llvm-svn: 100313
* fix an ugly wart in the MCInstPrinter api where theChris Lattner2010-04-041-3/+2
| | | | | | | | raw_ostream to print an instruction to had to be specified at MCInstPrinter construction time instead of being able to pick at each call to printInstruction. llvm-svn: 100307
* change a ton of code to not implicitly use the "O" raw_ostreamChris Lattner2010-04-041-109/+186
| | | | | | member of AsmPrinter. Instead, pass it in explicitly. llvm-svn: 100306
* asmstreamerize the .size directive for function bodies, force clientsChris Lattner2010-04-031-1/+1
| | | | | | of printOffset to pass in a stream to print to. llvm-svn: 100296
* Comment the changes for r98218 and friends inside the source code.Bill Wendling2010-03-311-0/+5
| | | | llvm-svn: 100031
* Rip out the 'is temporary' nonsense from the MCContext interface toChris Lattner2010-03-301-3/+3
| | | | | | | | | create symbols. It is extremely error prone and a source of a lot of the remaining integrated assembler bugs on x86-64. This fixes rdar://7807601. llvm-svn: 99902
* Re-commit r98683 ("remove redundant writeback flag from ARM address mode 6")Bob Wilson2010-03-201-10/+10
| | | | | | | with changes to add a separate optional register update argument. Change all the NEON instructions with address register writeback to use it. llvm-svn: 99095
* Refines 98745 so that it only contains the patch related to the output of theJohnny Chen2010-03-171-12/+1
| | | | | | | | | addressing modes to omit the '+' from the assembler syntax #+/-<imm> or +/-<Rm>. This patch removes the impl of printT2AddrModeImm8s4OffsetOperand() from ARMAsmPrinter.cpp. It is used by disassembler as of now. llvm-svn: 98774
* Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrmJohnny Chen2010-03-171-17/+29
| | | | | | | | | | | | | instructions to help disassembly. We also changed the output of the addressing modes to omit the '+' from the assembler syntax #+/-<imm> or +/-<Rm>. See, for example, A8.6.57/58/60. And modified test cases to not expect '+' in +reg or #+num. For example, ; CHECK: ldr.w r9, [r7, #28] llvm-svn: 98745
* Revert 98683. It is breaking something in the disassembler.Bob Wilson2010-03-161-2/+11
| | | | llvm-svn: 98692
* Remove redundant writeback flag from ARM address mode 6. Also remove theBob Wilson2010-03-161-11/+2
| | | | | | | optional register update argument, which is currently unused -- when we add support for that, it can just be a separate operand. llvm-svn: 98683
* Remove redundant writeback flag in ARM addressing mode 5.Bob Wilson2010-03-161-2/+0
| | | | llvm-svn: 98648
* Remove the writeback flag from ARM's address mode 4. Now that we have separateBob Wilson2010-03-161-2/+0
| | | | | | instructions for ld/st with writeback, the flag is completely redundant. llvm-svn: 98643
* Fix unused variable warnings.Bob Wilson2010-03-161-1/+0
| | | | llvm-svn: 98642
* --- Reverse-merging r98637 into '.':Bob Wilson2010-03-161-29/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U test/CodeGen/ARM/tls2.ll U test/CodeGen/ARM/arm-negative-stride.ll U test/CodeGen/ARM/2009-10-30.ll U test/CodeGen/ARM/globals.ll U test/CodeGen/ARM/str_pre-2.ll U test/CodeGen/ARM/ldrd.ll U test/CodeGen/ARM/2009-10-27-double-align.ll U test/CodeGen/Thumb2/thumb2-strb.ll U test/CodeGen/Thumb2/ldr-str-imm12.ll U test/CodeGen/Thumb2/thumb2-strh.ll U test/CodeGen/Thumb2/thumb2-ldr.ll U test/CodeGen/Thumb2/thumb2-str_pre.ll U test/CodeGen/Thumb2/thumb2-str.ll U test/CodeGen/Thumb2/thumb2-ldrh.ll U utils/TableGen/TableGen.cpp U utils/TableGen/DisassemblerEmitter.cpp D utils/TableGen/RISCDisassemblerEmitter.h D utils/TableGen/RISCDisassemblerEmitter.cpp U Makefile.rules U lib/Target/ARM/ARMInstrNEON.td U lib/Target/ARM/Makefile U lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp U lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp U lib/Target/ARM/AsmPrinter/ARMInstPrinter.h D lib/Target/ARM/Disassembler U lib/Target/ARM/ARMInstrFormats.td U lib/Target/ARM/ARMAddressingModes.h U lib/Target/ARM/Thumb2ITBlockPass.cpp llvm-svn: 98640
* Initial ARM/Thumb disassembler check-in. It consists of a tablgen backendJohnny Chen2010-03-161-17/+29
| | | | | | | | | | | | | | | | | | (RISCDisassemblerEmitter) which emits the decoder functions for ARM and Thumb, and the disassembler core which invokes the decoder function and builds up the MCInst based on the decoded Opcode. Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm instructions to help disassembly. We also changed the output of the addressing modes to omit the '+' from the assembler syntax #+/-<imm> or +/-<Rm>. See, for example, A8.6.57/58/60. And modified test cases to not expect '+' in +reg or #+num. For example, ; CHECK: ldr.w r9, [r7, #28] llvm-svn: 98637
* Stop using the old pre-UAL syntax for LDM/STM instruction suffixes.Bob Wilson2010-03-161-11/+1
| | | | | | | This does not move entirely to UAL syntax, since the default "increment after" suffix is empty but we still use "IA" for that. llvm-svn: 98635
* eliminate the now-unneeded context argument of MBB::getSymbol()Chris Lattner2010-03-131-6/+6
| | | | llvm-svn: 98451
* rearrange MCContext ownership. Before LLVMTargetMachine created it Chris Lattner2010-03-131-3/+2
| | | | | | | | | | | and passing off ownership to AsmPrinter. Now MachineModuleInfo creates it and owns it by value. This allows us to use MCSymbols more consistently throughout the rest of the code generator, and simplifies a bit of code. This also allows MachineFunction to keep an MCContext reference handy, and cleans up the TargetRegistry interfaces for AsmPrinters. llvm-svn: 98450
* Change ARM ld/st multiple instructions to have variant instructions forBob Wilson2010-03-131-3/+4
| | | | | | | | | | | | | | | writebacks to the address register. This gets rid of the hack that the first register on the list was the magic writeback register operand. There was an implicit constraint that if that operand was not reg0 it had to match the base register operand. The post-RA scheduler's antidependency breaker did not understand that constraint and sometimes changed one without the other. This also fixes Radar 7495976 and should help the verifier work better for ARM code. There are now new ld/st instructions explicit writeback operands and explicit constraints that tie those registers together. llvm-svn: 98409
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