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* Formatting changes. No functionality change.Bill Wendling2011-01-031-80/+77
* Use a StringSwitch<> instead of a manually constructed string matcher.Jim Grosbach2010-12-241-10/+7
* Recognize a few more documented register name aliases for ARM in the asm lexer.Jim Grosbach2010-12-231-0/+18
* Trailing whitespace.Jim Grosbach2010-12-221-15/+15
* The tLDR et al instructions were emitting either a reg/reg or reg/immBill Wendling2010-12-141-13/+17
* Fix the leak from r121401 of the Operands erased in the list but not deleted.Kevin Enderby2010-12-101-6/+15
* Add support for parsing ARM arithmetic instructions that update or don't updateKevin Enderby2010-12-091-6/+45
* Add parens to pacify gcc.Benjamin Kramer2010-12-071-1/+1
* Encode the register operand of ARM CondCode operands correctly. ARM::CPSR ifJim Grosbach2010-12-061-2/+2
* The ARM AsmMatcher needs to know that the CCOut operand is a register value,Jim Grosbach2010-12-061-1/+20
* * Add support for encoding t_addrmode_s2 and t_addrmode_s1. They are the same asBill Wendling2010-11-301-1/+1
* Add parsing for the Thumb t_addrmode_s4 addressing mode. This can almostBill Wendling2010-11-301-6/+35
* Add a few missing initializers.Jim Grosbach2010-11-291-2/+2
* Nuke trailing whitespace.Jim Grosbach2010-11-291-3/+3
* The "trap" instruction is one of this which doesn't have a condition code. HackBill Wendling2010-11-211-2/+5
* Use array_pod_sort because the list is contiguous.Bill Wendling2010-11-191-1/+1
* Add support for parsing the writeback ("!") token.Bill Wendling2010-11-181-65/+80
* Don't allocate the SmallVector of Registers. It gets messy figuring out whoBill Wendling2010-11-181-13/+5
* Proper encoding for VLDM and VSTM instructions. The register lists for theseBill Wendling2010-11-171-3/+27
* Emit a '!' if this is a "writeback" register or memory address.Bill Wendling2010-11-101-2/+2
* Rename a parameter to avoid confusion with a local variableMatt Beaumont-Gay2010-11-101-3/+3
* Emit the warning about the register list not being in ascending order only once.Bill Wendling2010-11-091-5/+8
* s/std::vector/SmallVector/Bill Wendling2010-11-091-12/+11
* Delete the allocated vector.Bill Wendling2010-11-091-0/+4
* Two types of instructions have register lists:Bill Wendling2010-11-091-56/+32
* The "addRegListOperands()" function returns the start register and the totalBill Wendling2010-11-081-15/+21
* Revert.Bill Wendling2010-11-081-1/+1
* In this context, a reglist is a reg.Bill Wendling2010-11-071-1/+1
* Add support for parsing register lists. We can't use a bitfield to keep track ofBill Wendling2010-11-061-22/+64
* Return the base register of a register list for the "getReg()" method. This isBill Wendling2010-11-061-3/+8
* General cleanup:Bill Wendling2010-11-061-36/+21
* Add a RegList (register list) object to ARMOperand. It will be used soon to holdBill Wendling2010-11-061-1/+38
* Fix grammar.Bill Wendling2010-11-061-1/+1
* Fix grammar.Bill Wendling2010-11-061-3/+3
* MatchRegisterName() returns 0 if it can't match the register.Bill Wendling2010-11-061-2/+2
* Use TryParseRegister() instead of MatchRegisterName(). The former returns -1Bill Wendling2010-11-061-5/+2
* Hook up the '.code {16|32}' directive to the streamer.Jim Grosbach2010-11-051-2/+5
* Hook up the '.thumb_func' directive to the streamer.Jim Grosbach2010-11-051-3/+5
* Fix past-o.Jim Grosbach2010-11-051-1/+1
* The MC code couldn't handle ARM LDR instructions with negative offsets:Bill Wendling2010-11-031-3/+13
* Add FIXME.Jim Grosbach2010-11-011-0/+1
* Mark ARM subtarget features that are available for the assembler.Jim Grosbach2010-11-011-1/+5
* trailing whitespaceJim Grosbach2010-11-011-5/+5
* Tidy up.Jim Grosbach2010-10-301-1/+1
* simplify this code.Chris Lattner2010-10-301-8/+4
* split MaybeParseRegister into its two logical uses, eliminating malloc+free t...Chris Lattner2010-10-301-35/+38
* Some instructions end with an "ls" prefix, but it doesn't indicate that they areBill Wendling2010-10-291-3/+9
* add FIXMEJim Grosbach2010-10-291-0/+5
* Handle ARM addrmode5 instructions with an offset.Jim Grosbach2010-10-291-9/+24
* Revert 117660. Apparently it's not as trivial as that...Jim Grosbach2010-10-291-2/+2
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