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path: root/llvm/lib/Target/ARM/ARMRegisterInfo.cpp
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* Switch the MachineOperand accessors back to the short names likeDan Gohman2008-10-031-4/+4
* Re-apply 56683 with fixes.Evan Cheng2008-09-271-1/+2
* Temporarily reverting r56683. This is causing a failure during the build of l...Bill Wendling2008-09-261-3/+1
* Fix @llvm.frameaddress codegen. FP elimination optimization should be disable...Evan Cheng2008-09-261-1/+3
* Infrastructure for getting the machine code size of a function and an instruc...Nicolas Geoffray2008-04-161-1/+1
* Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo.Evan Cheng2008-03-311-30/+12
* Spiller now remove unused spill slots.Evan Cheng2008-02-271-0/+2
* Remove bunch of gcc 4.3-related warnings from TargetAnton Korobeynikov2008-02-201-1/+2
* Rename MRegisterInfo to TargetRegisterInfo.Dan Gohman2008-02-101-1/+1
* rename MachineInstr::setInstrDescriptor -> setDescChris Lattner2008-01-111-7/+7
* rename TargetInstrDescriptor -> TargetInstrDesc.Chris Lattner2008-01-071-2/+2
* Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflectsChris Lattner2008-01-071-2/+2
* Move even more functionality from MRegisterInfo into TargetInstrInfo.Owen Anderson2008-01-071-151/+45
* rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate.Chris Lattner2008-01-061-2/+2
* rename isStore -> mayStore to more accurately reflect what it captures.Chris Lattner2008-01-061-1/+1
* Move some more functionality from MRegisterInfo to TargetInstrInfo.Owen Anderson2008-01-041-44/+0
* Move some more instruction creation methods from RegisterInfo into InstrInfo.Owen Anderson2008-01-011-128/+0
* Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of theOwen Anderson2007-12-311-28/+0
* Rename SSARegMap -> MachineRegisterInfo in keeping with the idea Chris Lattner2007-12-311-11/+12
* Add new shorter predicates for testing machine operands for various types: Chris Lattner2007-12-301-2/+2
* Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewis...Chris Lattner2007-12-301-8/+8
* use simplified operand addition methods.Chris Lattner2007-12-301-8/+9
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+1
* DohEvan Cheng2007-12-081-1/+1
* Fix a compilation warning.Evan Cheng2007-12-081-1/+1
* Add a argument to storeRegToStackSlot and storeRegToAddr to specify whetherEvan Cheng2007-12-051-7/+41
* Remove redundant foldMemoryOperand variants and other code clean up.Evan Cheng2007-12-021-1/+5
* Add parameter to getDwarfRegNum to permit targetsDale Johannesen2007-11-131-1/+1
* Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stackBill Wendling2007-11-131-1/+4
* Use TableGen to emit information for dwarf register numbers. Anton Korobeynikov2007-11-111-0/+5
* - Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but o...Evan Cheng2007-10-181-2/+2
* Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister p...Evan Cheng2007-10-181-4/+4
* - Added a few target hooks to generate load / store instructions from / to anyEvan Cheng2007-10-051-21/+110
* Allow copyRegToReg to emit cross register classes copies.Evan Cheng2007-09-261-4/+10
* Change instruction description to split OperandList into OutOperandList andEvan Cheng2007-07-191-2/+2
* Only adjust esp around calls in presence of alloca.Evan Cheng2007-07-191-1/+1
* Long live the exception handling!Anton Korobeynikov2007-07-141-2/+3
* Remove clobbersPred. Add an OptionalDefOperand to instructions which have the...Evan Cheng2007-07-101-5/+9
* Added ARM::CPSR to represent ARM CPSR status register.Evan Cheng2007-07-051-49/+59
* Add missing const qualifiers.Evan Cheng2007-05-291-3/+3
* Add PredicateOperand to all ARM instructions that have the condition field.Evan Cheng2007-05-151-48/+77
* Fix PR1390 in a better way.Lauro Ramos Venancio2007-05-071-12/+41
* Fix PR1390.Lauro Ramos Venancio2007-05-051-38/+10
* Debug support for arm-linux.Lauro Ramos Venancio2007-05-031-0/+5
* eliminateFrameIndex() change.Evan Cheng2007-05-011-3/+4
* Under normal circumstances, when a frame pointer is not required, we reserveEvan Cheng2007-05-011-3/+27
* add parenthesis.Lauro Ramos Venancio2007-04-271-2/+2
* In Thumb mode, the frame register must be R7.Lauro Ramos Venancio2007-04-271-2/+2
* Match MachineFunction::UsedPhysRegs changes.Evan Cheng2007-04-251-9/+6
* Fix a bug in getFrameRegister.Lauro Ramos Venancio2007-04-191-1/+4
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