| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Add a ARM-specific SD node for VBSL so that forms with a constant first operand | Cameron Zwarich | 2011-03-30 | 1 | -0/+3 |
| * | Re-apply r127953 with fixes: eliminate empty return block if it has no predec... | Evan Cheng | 2011-03-21 | 1 | -0/+2 |
| * | Revert r127953, "SimplifyCFG has stopped duplicating returns into predecessors | Daniel Dunbar | 2011-03-19 | 1 | -2/+0 |
| * | SimplifyCFG has stopped duplicating returns into predecessors to canonicalize IR | Evan Cheng | 2011-03-19 | 1 | -0/+2 |
| * | Some minor cleanups based on feedback. | Bill Wendling | 2011-03-15 | 1 | -2/+0 |
| * | Generate a VTBL instruction instead of a series of loads and stores when we | Bill Wendling | 2011-03-14 | 1 | -0/+4 |
| * | Fix a compiler crash where a Glue value had multiple uses. Radar 9049552. | Bob Wilson | 2011-03-08 | 1 | -0/+1 |
| * | Move getRegPressureLimit() from TargetLoweringInfo to TargetRegisterInfo. | Cameron Zwarich | 2011-03-07 | 1 | -3/+0 |
| * | Remove unused conditional negate operations. | Bob Wilson | 2011-03-05 | 1 | -1/+0 |
| * | Support for byval parameters on ARM. Will be enabled by a forthcoming | Stuart Hastings | 2011-02-28 | 1 | -0/+3 |
| * | Add codegen support for using post-increment NEON load/store instructions. | Bob Wilson | 2011-02-07 | 1 | -1/+22 |
| * | Given a pair of floating point load and store, if there are no other uses of | Evan Cheng | 2011-02-02 | 1 | -2/+4 |
| * | Last round of fixes for movw + movt global address codegen. | Evan Cheng | 2011-01-21 | 1 | -0/+2 |
| * | Materialize GA addresses with movw + movt pairs for Darwin in PIC mode. e.g. | Evan Cheng | 2011-01-17 | 1 | -0/+2 |
| * | Recognize inline asm 'rev /bin/bash, ' as a bswap intrinsic call. | Evan Cheng | 2011-01-08 | 1 | -0/+2 |
| * | Lower some BUILD_VECTORS using VEXT+shuffle. | Bob Wilson | 2011-01-07 | 1 | -0/+4 |
| * | Enable sibling call optimization of libcalls which are expanded during | Evan Cheng | 2010-11-30 | 1 | -0/+2 |
| * | Add support for NEON VLD2-dup instructions. | Bob Wilson | 2010-11-28 | 1 | -1/+6 |
| * | Add support for ARM's specialized vector-compare-against-zero instructions. | Owen Anderson | 2010-11-08 | 1 | -0/+5 |
| * | Disallow the certain NEON modified-immediate forms when generating vorr or vbic. | Owen Anderson | 2010-11-05 | 1 | -0/+7 |
| * | Add codegen and encoding support for the immediate form of vbic. | Owen Anderson | 2010-11-05 | 1 | -1/+3 |
| * | Add support for code generation of the one register with immediate form of vorr. | Owen Anderson | 2010-11-03 | 1 | -1/+4 |
| * | Fix preload instruction isel. Only v7 supports pli, and only v7 with mp exten... | Evan Cheng | 2010-11-03 | 1 | -0/+2 |
| * | Overhaul memory barriers in the ARM backend. Radar 8601999. | Bob Wilson | 2010-10-30 | 1 | -2/+2 |
| * | Inline asm multiple alternative constraints development phase 2 - improved ba... | John Thompson | 2010-10-29 | 1 | -0/+6 |
| * | Add a pre-dispatch SjLj EH hook on the unwind edge for targets to do any | Jim Grosbach | 2010-10-19 | 1 | -2/+4 |
| * | Remove unused ARMISD::AND selection DAG node. | Bob Wilson | 2010-10-15 | 1 | -2/+0 |
| * | Define the TargetLowering::getTgtMemIntrinsic hook for ARM so that NEON load | Bob Wilson | 2010-09-21 | 1 | -0/+3 |
| * | Teach if-converter to be more careful with predicating instructions that would | Evan Cheng | 2010-09-10 | 1 | -0/+2 |
| * | Remove NEON vmull, vmlal, and vmlsl intrinsics, replacing them with multiply, | Bob Wilson | 2010-09-01 | 1 | -0/+4 |
| * | Create an ARMISD::AND node. This node is exactly like the "ARM::AND" node, but | Bill Wendling | 2010-08-29 | 1 | -0/+2 |
| * | Consider this code snippet: | Bill Wendling | 2010-08-11 | 1 | -0/+1 |
| * | Add support for getting & setting the FPSCR application register on ARM when ... | Nate Begeman | 2010-08-03 | 1 | -1/+2 |
| * | Remove dead prototype | Jim Grosbach | 2010-07-28 | 1 | -1/+0 |
| * | Hook in GlobalMerge pass | Anton Korobeynikov | 2010-07-24 | 1 | -0/+4 |
| * | - Allow target to specify when is register pressure "too high". In most cases, | Evan Cheng | 2010-07-23 | 1 | -0/+6 |
| * | Baby steps towards ARM fast-isel. | Eric Christopher | 2010-07-21 | 1 | -0/+9 |
| * | Teach bottom up pre-ra scheduler to track register pressure. Work in progress. | Evan Cheng | 2010-07-21 | 1 | -2/+2 |
| * | ARM has to provide its own TargetLowering::findRepresentativeClass because it... | Evan Cheng | 2010-07-19 | 1 | -0/+4 |
| * | Since ARM emits inline jump tables as part of the ConstantIsland pass, | Jim Grosbach | 2010-07-19 | 1 | -0/+2 |
| * | revert so I can get the right PR# in the log message. | Jim Grosbach | 2010-07-19 | 1 | -2/+0 |
| * | Since ARM emits inline jump tables as part of the ConstantIsland pass, | Jim Grosbach | 2010-07-19 | 1 | -0/+2 |
| * | Add basic support to code-gen the ARM/Thumb2 bit-field insert (BFI) instruction | Jim Grosbach | 2010-07-16 | 1 | -1/+5 |
| * | Add support for NEON VMVN immediate instructions. | Bob Wilson | 2010-07-14 | 1 | -1/+4 |
| * | Use a target-specific VMOVIMM DAG node instead of BUILD_VECTOR to represent | Bob Wilson | 2010-07-13 | 1 | -7/+1 |
| * | Extend the r107852 optimization which turns some fp compare to code sequence ... | Evan Cheng | 2010-07-13 | 1 | -3/+7 |
| * | Optimize some vfp comparisons to integer ones. This patch implements the simp... | Evan Cheng | 2010-07-08 | 1 | -0/+3 |
| * | Split the SDValue out of OutputArg so that SelectionDAG-independent | Dan Gohman | 2010-07-07 | 1 | -0/+3 |
| * | The hasMemory argument is irrelevant to how the argument | Dale Johannesen | 2010-06-25 | 1 | -1/+0 |
| * | Add basic support for NEON modified immediates besides VMOV. | Bob Wilson | 2010-06-15 | 1 | -1/+2 |
