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path: root/llvm/lib/Target/ARM/ARMISelLowering.cpp
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* Disable the Thumb no-return call optimization:Evan Cheng2012-11-101-8/+2
* Revert r167620; this can be implemented using an existing CL option.Chad Rosier2012-11-091-2/+1
* Add support for -mstrict-align compiler option for ARM targets.Chad Rosier2012-11-091-1/+2
* Mark the Int_eh_sjlj_dispatchsetup pseudo instruction as clobbering allChad Rosier2012-11-061-8/+9
* Vext Lowering was missing opportunitiesQuentin Colombet2012-11-021-4/+40
* Change ForceSizeOpt attribute into MinSize attributeQuentin Colombet2012-10-301-4/+4
* [code size][ARM] Emit regular call instructions instead of the move, branch s...Quentin Colombet2012-10-271-2/+8
* ARM:Stepan Dyatkovskiy2012-10-191-11/+18
* Issue:Stepan Dyatkovskiy2012-10-161-10/+19
* Fixed PR13938: the ARM backend was crashing because it couldn't select a VDUP...Silviu Baranga2012-10-151-2/+19
* ARM: tail-call inside a function where part of a byval argument is on caller'sManman Ren2012-10-121-0/+8
* ARM: Mark VSELECT as 'expand'.Jim Grosbach2012-10-121-0/+1
* Fix for LDRB instruction:Stepan Dyatkovskiy2012-10-101-1/+2
* Issue description:Stepan Dyatkovskiy2012-10-101-7/+13
* Create enums for the different attributes.Bill Wendling2012-10-091-2/+3
* Move TargetData to DataLayout.Micah Villmow2012-10-081-8/+8
* Add LLVM support for Swift.Bob Wilson2012-09-291-3/+3
* Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. S...Sylvestre Ledru2012-09-271-4/+4
* Fix a typo 'iff' => 'if'Sylvestre Ledru2012-09-271-4/+4
* Remove the `hasFnAttr' method from Function.Bill Wendling2012-09-261-2/+2
* Fix ordering of operands on lowering of atomicrmw min/max nodes on ARM.James Molloy2012-09-261-2/+2
* Use vld1 / vst2 for unaligned v2f64 load / store. e.g. Use vld1.16 for 2-byteEvan Cheng2012-09-181-5/+9
* This patch introduces A15 as a target in LLVM.Silviu Baranga2012-09-131-1/+1
* Set operation action for FFLOOR to Expand for all vector types for X86. Set F...Craig Topper2012-09-081-0/+1
* Custom DAGCombine for and/or/xor are for all ARMs.Jakob Stoklund Olesen2012-09-071-6/+3
* Fix self-host; ensure signedness is consistent.James Molloy2012-09-061-2/+2
* Improve codegen for BUILD_VECTORs on ARM.James Molloy2012-09-061-10/+56
* Patch to implement UMLAL/SMLAL instructions for the ARM architectureArnold Schwaighofer2012-09-041-0/+156
* Fix a couple of typos in EmitAtomic.Jakob Stoklund Olesen2012-08-311-2/+2
* Use a SmallPtrSet to dedup successors in EmitSjLjDispatchBlock.Jakob Stoklund Olesen2012-08-201-3/+2
* Remove the CAND/COR/CXOR custom ISD nodes and their select code.Jakob Stoklund Olesen2012-08-181-51/+0
* Also combine zext/sext into selects for ARM.Jakob Stoklund Olesen2012-08-181-47/+84
* Also pass logical ops to combineSelectAndUse.Jakob Stoklund Olesen2012-08-181-9/+42
* Add comment, clean up code. No functional change.Jakob Stoklund Olesen2012-08-171-30/+39
* Handle ARM MOVCC optimization in PeepholeOptimizer.Jakob Stoklund Olesen2012-08-161-48/+0
* Fold predicable instructions into MOVCC / t2MOVCC.Jakob Stoklund Olesen2012-08-151-0/+48
* Use vld1/vst1 to load/store f64 if alignment is < 4 and the target allows una...Evan Cheng2012-08-151-0/+2
* Do not optimize (or (and X,Y), Z) into BFI and other sequences if the AND ISD...Nadav Rotem2012-08-131-1/+5
* Revert 161581: Patch to implement UMLAL/SMLAL instructions for the ARMArnold Schwaighofer2012-08-121-156/+0
* Change addTypeForNeon to use MVT instead of EVT so all the calls to getSimple...Craig Topper2012-08-121-48/+43
* Patch to implement UMLAL/SMLAL instructions for the ARM architectureArnold Schwaighofer2012-08-091-0/+156
* Fall back to selection DAG isel for calls to builtin functions.Bob Wilson2012-08-031-2/+3
* Add support for the ARM GHC calling convention, this patch was in 3.0,Eric Christopher2012-08-031-0/+2
* ARM: Don't assume an SDNode is a constant.Jim Grosbach2012-07-251-0/+4
* Fix ARMTargetLowering::isLegalAddImmediate to consider thumb encodings.Andrew Trick2012-07-181-4/+11
* whitespaceAndrew Trick2012-07-181-2/+2
* ARM: use NOEN loads and stores if possible when handling struct byval.Manman Ren2012-06-181-8/+42
* ARM: optimization for sub+abs.Manman Ren2012-06-151-11/+6
* Re-enable the CMN instruction.Bill Wendling2012-06-111-0/+1
* ARM: properly handle alignment for struct byval.Manman Ren2012-06-011-246/+268
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