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path: root/llvm/lib/Target/ARM/ARMISelLowering.cpp
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* Re-commit of r238201 with fix for building with shared libraries.Luke Cheeseman2015-06-011-1/+47
* Add address space argument to isLegalAddressingModeMatt Arsenault2015-06-011-1/+2
* Thumb2: Modify codegen for memcpy intrinsic to prefer LDM/STM.Peter Collingbourne2015-05-281-0/+52
* Revert "Re-commit changes in r237579 with fix for bug breaking windows builds."Diego Novillo2015-05-261-47/+1
* Re-commit changes in r237579 with fix for bug breaking windows builds.Luke Cheeseman2015-05-261-1/+47
* Test CommitLuke Cheeseman2015-05-261-1/+0
* ARM: Fix comment and make it slightly more readableMatthias Braun2015-05-201-7/+7
* Simplify IRBuilder::CreateCall* by using ArrayRef+initializer_list/braced ini...David Blaikie2015-05-181-5/+5
* Revert r237579, as it broke windows buildbotsOliver Stannard2015-05-181-45/+2
* [LLVM - ARM/AArch64] Add ACLE special register intrinsicsOliver Stannard2015-05-181-2/+45
* Re-apply r237247 - [AArch64] Codegen VMAX/VMIN for safe math casesArtyom Skrobov2015-05-141-3/+0
* ARM: remove custom jump table UIDTim Northover2015-05-131-22/+11
* Revert r237247 - [AArch64] Codegen VMAX/VMIN.. as it is causing failures in S...Silviu Baranga2015-05-131-0/+3
* [AArch64] Codegen VMAX/VMIN for safe math casesArtyom Skrobov2015-05-131-3/+0
* Migrate existing backends that care about software floating pointEric Christopher2015-05-121-6/+10
* ScheduleDAGInstrs: In functions with tail calls PseudoSourceValues are not no...Arnold Schwaighofer2015-05-081-1/+3
* Fix typo.Matthias Braun2015-05-071-1/+1
* Change getTargetNodeName() to produce compiler warnings for missing cases, fi...Matthias Braun2015-05-071-2/+6
* [ARM] generate VMAXNM/VMINNM for a compare followed by a select, in safe math...Artyom Skrobov2015-05-061-25/+100
* Don't always apply kill flag in thumb2 ABS pseudo expansion.Pete Cooper2015-04-301-1/+2
* Reapply r235977 "[DebugInfo] Add debug locations to constant SD nodes"Sergey Dmitrouk2015-04-281-223/+251
* Revert "[DebugInfo] Add debug locations to constant SD nodes"Daniel Jasper2015-04-281-251/+223
* [DebugInfo] Add debug locations to constant SD nodesSergey Dmitrouk2015-04-281-223/+251
* Cleanup, remove unused return valueMatthias Braun2015-04-281-4/+2
* [ARM] make vminnm/vmaxnm work with ?le, ?ge and no-nans-fp-mathScott Douglass2015-04-081-9/+18
* Use movw/movt instead of constant pool loads to lower byval parameter copiesDerek Schuff2015-03-261-5/+9
* Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used.Benjamin Kramer2015-03-231-1/+2
* [ARM] Remove target-specific ITOFP/FPTOI nodesJames Molloy2015-03-231-44/+8
* [ARM] Align stack objects passed to memory intrinsicsJohn Brawn2015-03-181-0/+15
* In preparation for moving ARM's TargetRegisterInfo to the TargetMachineEric Christopher2015-03-121-1/+1
* Silencing an "enumeral and non-enumeral type in conditional expression" warni...Aaron Ballman2015-03-121-1/+1
* Have getCallPreservedMask and getThisCallPreservedMask take aEric Christopher2015-03-111-3/+3
* ARM: simplify and extend byval handlingTim Northover2015-03-111-216/+103
* Remove the remaining uses of abs64 and nuke it.Benjamin Kramer2015-03-091-3/+3
* Make constant arrays that are passed to functions as const.Benjamin Kramer2015-03-071-7/+5
* [ARM] Enable vector extload combine for legal types.Ahmed Bougacha2015-03-051-0/+22
* Mutate TargetLowering::shouldExpandAtomicRMWInIR to specifically dictate how ...JF Bastien2015-03-041-2/+5
* Remove MCStreamer.h include from MCContext.h and explictly include it where n...Pete Cooper2015-03-041-0/+1
* getRegForInlineAsmConstraint wants to use TargetRegisterInfo forEric Christopher2015-02-261-2/+3
* Remove an argument-less call to getSubtargetImpl from TargetLoweringBase.Eric Christopher2015-02-261-4/+5
* ARM: treat [N x i32] and [N x i64] as AAPCS composite typesTim Northover2015-02-241-4/+8
* Rewrite the global merge pass to be subprogram agnostic for now.Eric Christopher2015-02-231-6/+0
* CodeGen: convert CCState interface to using ArrayRefsTim Northover2015-02-211-9/+6
* [ARM] Re-re-apply VLD1/VST1 base-update combine.Ahmed Bougacha2015-02-191-14/+117
* [ARM] Minor cleanup to CombineBaseUpdate. NFC.Ahmed Bougacha2015-02-191-20/+22
* [CodeGen] Use ArrayRef instead of std::vector&. NFC.Ahmed Bougacha2015-02-191-1/+1
* AArch64: Safely handle the incoming sret call argument.Andrew Trick2015-02-161-3/+8
* ARM: Canonicalize access to function attributes, NFCDuncan P. N. Exon Smith2015-02-141-9/+4
* MathExtras: Bring Count(Trailing|Leading)Ones and CountPopulation in line wit...Benjamin Kramer2015-02-121-5/+1
* ARM & AArch64: teach LowerVSETCC that output type size may differ from input.Tim Northover2015-02-081-13/+16
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