| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | PR2985 / <rdar://problem/6584986> | Jim Grosbach | 2009-04-07 | 1 | -3/+5 |
| * | tADDhirr is a thumb instruction. Do not allow this code to be reached in non-... | Evan Cheng | 2009-03-26 | 1 | -0/+2 |
| * | fix PR3538 for ARM. | Chris Lattner | 2009-02-12 | 1 | -12/+19 |
| * | Eliminate remaining non-DebugLoc version of getTargetNode. | Dale Johannesen | 2009-02-06 | 1 | -1/+3 |
| * | get rid of some non-DebugLoc getTargetNode variants. | Dale Johannesen | 2009-02-06 | 1 | -1/+2 |
| * | Get rid of one more non-DebugLoc getNode and | Dale Johannesen | 2009-02-06 | 1 | -7/+9 |
| * | Move a few containers out of ScheduleDAGInstrs::BuildSchedGraph | Dan Gohman | 2009-01-15 | 1 | -1/+1 |
| * | Preliminary ARM debug support based on patch by Mikael of FlexyCore. | Evan Cheng | 2008-12-10 | 1 | -2/+38 |
| * | Update a comment. | Dan Gohman | 2008-12-03 | 1 | -3/+4 |
| * | Eliminate the ISel priority queue, which used the topological order for a | Dan Gohman | 2008-11-05 | 1 | -28/+0 |
| * | Have TableGen emit setSubgraphColor calls under control of a -gen-debug | David Greene | 2008-10-27 | 1 | -1/+1 |
| * | Avoid creating two TargetLowering objects for each target. | Dan Gohman | 2008-10-03 | 1 | -3/+1 |
| * | Cosmetic. | Evan Cheng | 2008-09-18 | 1 | -3/+5 |
| * | Rename ConstantSDNode::getValue to getZExtValue, for consistency | Dan Gohman | 2008-09-12 | 1 | -21/+27 |
| * | erect abstraction boundaries for accessing SDValue members, rename Val -> Nod... | Gabor Greif | 2008-08-28 | 1 | -10/+10 |
| * | disallow direct access to SDValue::ResNo, provide a getter instead | Gabor Greif | 2008-08-26 | 1 | -1/+1 |
| * | Move the point at which FastISel taps into the SelectionDAGISel | Dan Gohman | 2008-08-23 | 1 | -3/+3 |
| * | Simplify SelectRoot's interface, and factor out some common code | Dan Gohman | 2008-08-21 | 1 | -1/+1 |
| * | Rename SDOperand to SDValue. | Dan Gohman | 2008-07-27 | 1 | -121/+121 |
| * | Add a new function, ReplaceAllUsesOfValuesWith, which handles bulk | Dan Gohman | 2008-07-17 | 1 | -2/+1 |
| * | Add explicit keywords. | Dan Gohman | 2008-07-07 | 1 | -1/+1 |
| * | Split scheduling from instruction selection. | Evan Cheng | 2008-06-30 | 1 | -4/+2 |
| * | Wrap MVT::ValueType in a struct to get type safety | Duncan Sands | 2008-06-06 | 1 | -5/+5 |
| * | Dwarf requires variable entries to be in the source order. Right now, since w... | Evan Cheng | 2008-02-04 | 1 | -1/+0 |
| * | explicitly include Compiler.h instead of getting it from tblgen in the middle... | Chris Lattner | 2008-02-03 | 1 | -0/+1 |
| * | don't do ReplaceUses on a result that doesn't exist. | Chris Lattner | 2008-02-03 | 1 | -2/+4 |
| * | SDIsel processes llvm.dbg.declare by recording the variable debug information... | Evan Cheng | 2008-02-02 | 1 | -0/+1 |
| * | Factor the addressing mode and the load/store VT out of LoadSDNode | Dan Gohman | 2008-01-30 | 1 | -1/+1 |
| * | Rename SSARegMap -> MachineRegisterInfo in keeping with the idea | Chris Lattner | 2007-12-31 | 1 | -1/+0 |
| * | Remove attribution from file headers, per discussion on llvmdev. | Chris Lattner | 2007-12-29 | 1 | -2/+2 |
| * | Migrate X86 and ARM from using X86ISD::{,I}DIV and ARMISD::MULHILO{U,S} to | Dan Gohman | 2007-10-08 | 1 | -2/+2 |
| * | Remove clobbersPred. Add an OptionalDefOperand to instructions which have the... | Evan Cheng | 2007-07-10 | 1 | -12/+14 |
| * | Unfortunately we now require C++ code to isel Bcc, conditional moves, etc. | Evan Cheng | 2007-07-05 | 1 | -23/+171 |
| * | Add PredicateOperand to all ARM instructions that have the condition field. | Evan Cheng | 2007-05-15 | 1 | -13/+27 |
| * | match a reassociated form of fnmul. This implements CodeGen/ARM/fnmul.ll | Chris Lattner | 2007-05-03 | 1 | -0/+1 |
| * | Fix naming inconsistencies. | Evan Cheng | 2007-03-19 | 1 | -1/+1 |
| * | Special LDR instructions to load from non-pc-relative constantpools. These are | Evan Cheng | 2007-03-19 | 1 | -2/+2 |
| * | AM2 can match 2^n +/- 1. e.g. ldr r3, [r2, r2, lsl #2] | Evan Cheng | 2007-03-13 | 1 | -0/+23 |
| * | Get rid of references to iostream. | Evan Cheng | 2007-02-07 | 1 | -1/+0 |
| * | Select add FI, c correctly. | Evan Cheng | 2007-02-06 | 1 | -1/+6 |
| * | - Store val, [sp, c] must be selected to tSTRsp. | Evan Cheng | 2007-02-06 | 1 | -4/+34 |
| * | Change the operand orders to t_addrmode_s* to make it easier to morph | Evan Cheng | 2007-01-30 | 1 | -15/+15 |
| * | Use PC relative ldr to load from a constantpool in Thumb mode. | Evan Cheng | 2007-01-24 | 1 | -8/+17 |
| * | Allow [ fi#c, imm ] as ARM load / store addresses. | Evan Cheng | 2007-01-24 | 1 | -25/+39 |
| * | Various Thumb mode load / store isel bug fixes. | Evan Cheng | 2007-01-24 | 1 | -13/+38 |
| * | - Reorg Thumb load / store instructions. Combine each rr and ri pair of | Evan Cheng | 2007-01-23 | 1 | -21/+38 |
| * | ARM backend contribution from Apple. | Evan Cheng | 2007-01-19 | 1 | -986/+450 |
| * | Build constants using instructions mov/orr or mvn/eor. | Lauro Ramos Venancio | 2007-01-12 | 1 | -20/+74 |
| * | Expand SELECT (f32/f64) and FCOPYSIGN (f32/f64). | Lauro Ramos Venancio | 2007-01-04 | 1 | -0/+5 |
| * | implement missing compares | Rafael Espindola | 2006-12-31 | 1 | -37/+66 |
