Wrap MVT::ValueType in a struct to get type safety

and better control the abstraction.  Rename the type
to MVT.  To update out-of-tree patches, the main
thing to do is to rename MVT::ValueType to MVT, and
rewrite expressions like MVT::getSizeInBits(VT) in
the form VT.getSizeInBits().  Use VT.getSimpleVT()
to extract a MVT::SimpleValueType for use in switch
statements (you will get an assert failure if VT is
an extended value type - these shouldn't exist after
type legalization).
This results in a small speedup of codegen and no
new testsuite failures (x86-64 linux).

llvm-svn: 52044

1 files changed, 5 insertions, 5 deletions

diff --git a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
index 5029a6952ab..eaa16fc9d68 100644
--- a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -660,7 +660,7 @@ SDNode *ARMDAGToDAGISel::Select(SDOperand Op) {
   case ISD::LOAD: {
     LoadSDNode *LD = cast<LoadSDNode>(Op);
     ISD::MemIndexedMode AM = LD->getAddressingMode();
-    MVT::ValueType LoadedVT = LD->getMemoryVT();
+    MVT LoadedVT = LD->getMemoryVT();
     if (AM != ISD::UNINDEXED) {
       SDOperand Offset, AMOpc;
       bool isPre = (AM == ISD::PRE_INC) || (AM == ISD::PRE_DEC);
@@ -741,7 +741,7 @@ SDNode *ARMDAGToDAGISel::Select(SDOperand Op) {
   }
   case ARMISD::CMOV: {
     bool isThumb = Subtarget->isThumb();
-    MVT::ValueType VT = Op.getValueType();
+    MVT VT = Op.getValueType();
     SDOperand N0 = Op.getOperand(0);
     SDOperand N1 = Op.getOperand(1);
     SDOperand N2 = Op.getOperand(2);
@@ -805,7 +805,7 @@ SDNode *ARMDAGToDAGISel::Select(SDOperand Op) {
                                cast<ConstantSDNode>(N2)->getValue()), MVT::i32);
     SDOperand Ops[] = { N0, N1, Tmp2, N3, InFlag };
     unsigned Opc = 0;
-    switch (VT) {
+    switch (VT.getSimpleVT()) {
     default: assert(false && "Illegal conditional move type!");
       break;
     case MVT::i32:
@@ -821,7 +821,7 @@ SDNode *ARMDAGToDAGISel::Select(SDOperand Op) {
     return CurDAG->SelectNodeTo(Op.Val, Opc, VT, Ops, 5);
   }
   case ARMISD::CNEG: {
-    MVT::ValueType VT = Op.getValueType();
+    MVT VT = Op.getValueType();
     SDOperand N0 = Op.getOperand(0);
     SDOperand N1 = Op.getOperand(1);
     SDOperand N2 = Op.getOperand(2);
@@ -837,7 +837,7 @@ SDNode *ARMDAGToDAGISel::Select(SDOperand Op) {
                                cast<ConstantSDNode>(N2)->getValue()), MVT::i32);
     SDOperand Ops[] = { N0, N1, Tmp2, N3, InFlag };
     unsigned Opc = 0;
-    switch (VT) {
+    switch (VT.getSimpleVT()) {
     default: assert(false && "Illegal conditional move type!");
       break;
     case MVT::f32: