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path: root/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
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* When performing instruction selection for LDR_PRE_IMM/LDRB_PRE_IMM, we still ...Owen Anderson2011-08-311-1/+8
* 64-bit atomic cmpxchg for ARM.Eli Friedman2011-08-311-7/+13
* Some 64-bit atomic operations on ARM. 64-bit cmpxchg coming next.Eli Friedman2011-08-311-0/+32
* addrmode_imm12 and addrmode2_offset encode their immediate values differently...Owen Anderson2011-08-291-4/+28
* Fix ARM codegen breakage caused by r138653.Owen Anderson2011-08-261-6/+15
* invalid-LDR_PRE-arm.txt was already passing, but for the wrong reasons. We w...Owen Anderson2011-08-261-4/+4
* Thumb1 ADD/SUB SP instructions are predicable in Thumb2 mode.Jim Grosbach2011-08-241-2/+3
* ARM refactor indexed store instructions.Jim Grosbach2011-08-051-2/+5
* ARM parsing and encoding of SBFX and UBFX.Jim Grosbach2011-07-271-2/+4
* Split am2offset into register addend and immediate addend forms, necessary fo...Owen Anderson2011-07-261-13/+40
* Fix test failures caused by my so_reg refactoring.Owen Anderson2011-07-221-2/+2
* Get rid of the extraneous GPR operand on so_reg_imm operands, which in turn n...Owen Anderson2011-07-211-11/+9
* Split up the ARM so_reg ComplexPattern into so_reg_reg and so_reg_imm, allowi...Owen Anderson2011-07-211-15/+52
* Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate A...Evan Cheng2011-07-201-10/+12
* - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo andEvan Cheng2011-06-281-3/+3
* Change the REG_SEQUENCE SDNode to take an explict register class ID as its fi...Owen Anderson2011-06-161-12/+23
* Add support for ARM ldrexd/strexd intrinsics. They both use i32 register pairsBruno Cardoso Lopes2011-05-281-0/+105
* Zap a couple now-unused functions.Eli Friedman2011-04-291-10/+0
* This patch combines several changes from Evan Cheng for rdar://8659675.Bob Wilson2011-04-191-1/+1
* Do not lose mem_operands while lowering VLD / VST intrinsics.Evan Cheng2011-04-191-4/+29
* Reduce code duplication.Owen Anderson2011-03-181-31/+13
* Generate a VTBL instruction instead of a series of loads and stores when weBill Wendling2011-03-141-0/+29
* Remove dead code. These ARM instruction definitions no longer exist.Jim Grosbach2011-03-111-1/+1
* Remove unused conditional negate operations.Bob Wilson2011-03-051-28/+0
* Add patterns to use post-increment addressing for Neon VST1-lane instructions.Bob Wilson2011-02-251-0/+15
* Enhance ComputeMaskedBits to know that aligned frameindexesChris Lattner2011-02-131-40/+51
* Add codegen support for using post-increment NEON load/store instructions.Bob Wilson2011-02-071-144/+348
* Change VLD3/4 and VST3/4 for quad registers to not update the address register.Bob Wilson2011-02-071-60/+44
* Sorry, several patches in one.Evan Cheng2011-01-201-2/+2
* ARM/ISel: Factor out isScaledConstantInRange() helper.Daniel Dunbar2011-01-191-122/+110
* Materialize GA addresses with movw + movt pairs for Darwin in PIC mode. e.g.Evan Cheng2011-01-171-2/+1
* Model operand restrictions of mul-like instructions on ARMv5 viaAnton Korobeynikov2011-01-011-2/+6
* whitespaceAndrew Trick2010-12-241-1/+1
* rename MVT::Flag to MVT::Glue. "Flag" is a terrible name forChris Lattner2010-12-211-1/+1
* Use PairDRegs to implement ConcatVectors. No functionality change.Bob Wilson2010-12-171-7/+1
* Thumb1 had two patterns for the same load-from-constant-pool instruction.Jim Grosbach2010-12-151-1/+1
* Reapply r121808 now that the missing patterns have been supplied.Bill Wendling2010-12-151-16/+21
* Revert r121808 until I can fix the build.Bill Wendling2010-12-151-21/+16
* Make the ISel selections for LDR/STR the same as before the LDRr/LDRi split. InBill Wendling2010-12-141-16/+21
* The tLDR et al instructions were emitting either a reg/reg or reg/immBill Wendling2010-12-141-31/+111
* Fix some invalid alignments for Neon vld-dup and vld/st-lane instructions.Bob Wilson2010-12-101-0/+4
* Making use of VFP / NEON floating point multiply-accumulate / subtraction isEvan Cheng2010-12-051-1/+55
* Add support for NEON VLD3-dup instructions.Bob Wilson2010-11-301-0/+6
* Add support for NEON VLD3-dup instructions.Bob Wilson2010-11-291-0/+6
* Add support for NEON VLD2-dup instructions.Bob Wilson2010-11-281-0/+67
* Fix a cut-n-paste-error.Evan Cheng2010-11-191-1/+1
* Avoid isel movcc of large immediates when the large immediate is available in...Evan Cheng2010-11-171-10/+14
* Add conditional move of large immediate.Evan Cheng2010-11-131-14/+26
* Fix an obvious typo which inverted an immediate.Evan Cheng2010-11-131-1/+1
* Add conditional mvn instructions.Evan Cheng2010-11-121-5/+31
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