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authorEvan Cheng <evan.cheng@apple.com>2010-11-17 20:56:30 +0000
committerEvan Cheng <evan.cheng@apple.com>2010-11-17 20:56:30 +0000
commit39c81c0a5587b82c0c0bf715b33a3e38a96f1d45 (patch)
tree14e206d41b9603b34693cf0e1ad360820d0e75ad /llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
parent1ee6d240720d6da70f6d78269374c7680a2967f1 (diff)
downloadbcm5719-llvm-39c81c0a5587b82c0c0bf715b33a3e38a96f1d45.tar.gz
bcm5719-llvm-39c81c0a5587b82c0c0bf715b33a3e38a96f1d45.zip
Avoid isel movcc of large immediates when the large immediate is available in a register. These immediates aren't free.
llvm-svn: 119558
Diffstat (limited to 'llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp24
1 files changed, 14 insertions, 10 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
index b5ef7b1a879..70821e10224 100644
--- a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -1777,20 +1777,21 @@ SelectARMCMOVShiftOp(SDNode *N, SDValue FalseVal, SDValue TrueVal,
SDNode *ARMDAGToDAGISel::
SelectT2CMOVImmOp(SDNode *N, SDValue FalseVal, SDValue TrueVal,
- ARMCC::CondCodes CCVal, SDValue CCR, SDValue InFlag) {
+ ARMCC::CondCodes CCVal, SDValue CCR, SDValue InFlag) {
ConstantSDNode *T = dyn_cast<ConstantSDNode>(TrueVal);
- if (!T)
+ if (!T || !TrueVal.getNode()->hasOneUse())
return 0;
unsigned Opc = 0;
unsigned TrueImm = T->getZExtValue();
- bool isSoImm = is_t2_so_imm(TrueImm);
- if (isSoImm || TrueImm <= 0xffff) {
- Opc = isSoImm ? ARM::t2MOVCCi : ARM::t2MOVCCi16;
+ if (is_t2_so_imm(TrueImm)) {
+ Opc = ARM::t2MOVCCi;
+ } else if (TrueImm <= 0xffff) {
+ Opc = ARM::t2MOVCCi16;
} else if (is_t2_so_imm_not(TrueImm)) {
TrueImm = ~TrueImm;
Opc = ARM::t2MVNCCi;
- } else if (Subtarget->hasV6T2Ops()) {
+ } else if (TrueVal.getNode()->hasOneUse() && Subtarget->hasV6T2Ops()) {
// Large immediate.
Opc = ARM::t2MOVCCi32imm;
}
@@ -1807,7 +1808,7 @@ SelectT2CMOVImmOp(SDNode *N, SDValue FalseVal, SDValue TrueVal,
SDNode *ARMDAGToDAGISel::
SelectARMCMOVImmOp(SDNode *N, SDValue FalseVal, SDValue TrueVal,
- ARMCC::CondCodes CCVal, SDValue CCR, SDValue InFlag) {
+ ARMCC::CondCodes CCVal, SDValue CCR, SDValue InFlag) {
ConstantSDNode *T = dyn_cast<ConstantSDNode>(TrueVal);
if (!T)
return 0;
@@ -1815,12 +1816,15 @@ SelectARMCMOVImmOp(SDNode *N, SDValue FalseVal, SDValue TrueVal,
unsigned Opc = 0;
unsigned TrueImm = T->getZExtValue();
bool isSoImm = is_so_imm(TrueImm);
- if (isSoImm || (Subtarget->hasV6T2Ops() && TrueImm <= 0xffff)) {
- Opc = isSoImm ? ARM::MOVCCi : ARM::MOVCCi16;
+ if (isSoImm) {
+ Opc = ARM::MOVCCi;
+ } else if (Subtarget->hasV6T2Ops() && TrueImm <= 0xffff) {
+ Opc = ARM::MOVCCi16;
} else if (is_so_imm_not(TrueImm)) {
TrueImm = ~TrueImm;
Opc = ARM::MVNCCi;
- } else if (Subtarget->hasV6T2Ops() || ARM_AM::isSOImmTwoPartVal(TrueImm)) {
+ } else if (TrueVal.getNode()->hasOneUse() &&
+ (Subtarget->hasV6T2Ops() || ARM_AM::isSOImmTwoPartVal(TrueImm))) {
// Large immediate.
Opc = ARM::MOVCCi32imm;
}
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