| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Remove unused variables found by gcc-4.6's -Wunused-but-set-variable. | Jeffrey Yasskin | 2011-01-18 | 1 | -4/+0 |
| * | Materialize GA addresses with movw + movt pairs for Darwin in PIC mode. e.g. | Evan Cheng | 2011-01-17 | 1 | -1/+1 |
| * | fix some -Wself-assign warnings. | Chris Lattner | 2011-01-05 | 1 | -3/+3 |
| * | Arm and thumb call instructions are also in different orders. | Eric Christopher | 2010-12-21 | 1 | -13/+24 |
| * | Don't handle -arm-long-calls in fast isel for now. | Eric Christopher | 2010-12-15 | 1 | -0/+8 |
| * | Refactor load/store handling again. Simplify and make some room for | Eric Christopher | 2010-12-01 | 1 | -103/+60 |
| * | Noticed this on inspection, fix and update some comments. | Eric Christopher | 2010-11-30 | 1 | -3/+4 |
| * | Update fastisel for the changes in r120272. | Eric Christopher | 2010-11-29 | 1 | -3/+7 |
| * | Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept. | Wesley Peck | 2010-11-23 | 1 | -1/+1 |
| * | Rewrite address handling to use a structure with all the possible address | Eric Christopher | 2010-11-20 | 1 | -11/+76 |
| * | STRH only needs the additional operand, not t2STRH. Also invert conditional | Eric Christopher | 2010-11-20 | 1 | -9/+5 |
| * | Don't need to save piecemeal now. | Eric Christopher | 2010-11-19 | 1 | -4/+2 |
| * | Update comment. | Eric Christopher | 2010-11-19 | 1 | -3/+2 |
| * | Update comment. | Eric Christopher | 2010-11-19 | 1 | -1/+1 |
| * | Refactor address mode handling into a single struct (ala x86), this | Eric Christopher | 2010-11-19 | 1 | -50/+72 |
| * | Remove hard tabs. | Jim Grosbach | 2010-11-19 | 1 | -2/+2 |
| * | Recommit this change and remove the failing part of the test - it didn't | Eric Christopher | 2010-11-15 | 1 | -4/+5 |
| * | Temporarily revert this. | Eric Christopher | 2010-11-12 | 1 | -5/+4 |
| * | Make this happen for ARM like x86. Don't entirely bail out when | Eric Christopher | 2010-11-12 | 1 | -4/+5 |
| * | Fix up a few more spots of addrmode2 (or not) changes that were | Eric Christopher | 2010-11-12 | 1 | -6/+12 |
| * | Trailing whitespace. | Jim Grosbach | 2010-11-09 | 1 | -6/+6 |
| * | Make sure we have movw on the target before using it. | Eric Christopher | 2010-11-06 | 1 | -1/+1 |
| * | In the calling convention logic, ValVT is always a legal type, | Duncan Sands | 2010-11-04 | 1 | -1/+1 |
| * | Optimize generated code for integer materialization a bit. | Eric Christopher | 2010-11-03 | 1 | -1/+13 |
| * | Simplify uses of MVT and EVT. An MVT can be compared directly | Duncan Sands | 2010-11-03 | 1 | -7/+6 |
| * | Inside the calling convention logic LocVT is always a simple | Duncan Sands | 2010-11-03 | 1 | -36/+36 |
| * | Invert these branches by default, it makes assembly comparisons a little | Eric Christopher | 2010-11-03 | 1 | -2/+2 |
| * | Make sure we're only storing a single bit here. | Eric Christopher | 2010-11-02 | 1 | -2/+9 |
| * | Remove an assert - it's possible to be hit, and we just want to avoid | Eric Christopher | 2010-11-02 | 1 | -1/+1 |
| * | Whitespeace | Eric Christopher | 2010-11-02 | 1 | -1/+1 |
| * | No really, no thumb1 for arm fast isel. Also add an informative comment as | Eric Christopher | 2010-11-02 | 1 | -3/+7 |
| * | Make sure we have a legal type (and simple) before continuing. | Eric Christopher | 2010-10-30 | 1 | -1/+4 |
| * | Handle comparison values we already have - this fixes the consumer-typeset | Eric Christopher | 2010-10-29 | 1 | -4/+65 |
| * | Refactor ARM STR/STRB instruction patterns into STR{B}i12 and STR{B}rs, like | Jim Grosbach | 2010-10-27 | 1 | -5/+8 |
| * | Trailing whitespace | Jim Grosbach | 2010-10-27 | 1 | -17/+17 |
| * | Split ARM::LDRB into LDRBi12 and LDRBrs. Adjust accordingly. Continuing on | Jim Grosbach | 2010-10-27 | 1 | -3/+1 |
| * | First part of refactoring ARM addrmode2 (load/store) instructions to be more | Jim Grosbach | 2010-10-26 | 1 | -10/+5 |
| * | Move rejection of NEON parameters earlier in fast isel call processing, | Eric Christopher | 2010-10-23 | 1 | -3/+4 |
| * | Silence compiler warnings. | Evan Cheng | 2010-10-22 | 1 | -1/+5 |
| * | Add some basic ret instruction support to arm fast-isel. | Eric Christopher | 2010-10-22 | 1 | -0/+66 |
| * | These don't need to be virtual. | Eric Christopher | 2010-10-21 | 1 | -13/+13 |
| * | Handle storing args to the stack for calls. | Eric Christopher | 2010-10-21 | 1 | -4/+6 |
| * | More load/store refactoring, call reg+offset simplification from within | Eric Christopher | 2010-10-21 | 1 | -28/+36 |
| * | Custom lower f64 args passed in integer registers. | Eric Christopher | 2010-10-21 | 1 | -0/+15 |
| * | Fix a TODO by removing some unnecesary copies. | Eric Christopher | 2010-10-20 | 1 | -13/+5 |
| * | Revert r116220 - thus turning arm fast isel back on by default. | Eric Christopher | 2010-10-18 | 1 | -3/+3 |
| * | Remove the check for invalid calling conventions. Testing shows that they're | Eric Christopher | 2010-10-18 | 1 | -4/+1 |
| * | Lift arg promotion from the X86 backend. This should be unified at some point. | Eric Christopher | 2010-10-18 | 1 | -3/+57 |
| * | Now that we handle all allocas via a non-SP reg offset remove all of the | Eric Christopher | 2010-10-17 | 1 | -79/+39 |
| * | Allow more load types to be materialized through the allocas. | Eric Christopher | 2010-10-17 | 1 | -1/+1 |
