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| author | Jim Grosbach <grosbach@apple.com> | 2010-10-27 00:19:44 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2010-10-27 00:19:44 +0000 |
| commit | 5a7c7154703daeddbe7752116e07bd2114971f43 (patch) | |
| tree | 84400052586b0095f00f1bbf7a4812253eb5e8ad /llvm/lib/Target/ARM/ARMFastISel.cpp | |
| parent | a92801b6952b3f0325373f46c00955d03230795e (diff) | |
| download | bcm5719-llvm-5a7c7154703daeddbe7752116e07bd2114971f43.tar.gz bcm5719-llvm-5a7c7154703daeddbe7752116e07bd2114971f43.zip | |
Split ARM::LDRB into LDRBi12 and LDRBrs. Adjust accordingly. Continuing on
rdar://8477752.
llvm-svn: 117419
Diffstat (limited to 'llvm/lib/Target/ARM/ARMFastISel.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMFastISel.cpp | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/llvm/lib/Target/ARM/ARMFastISel.cpp b/llvm/lib/Target/ARM/ARMFastISel.cpp index 7cf7ec03559..3b72285d312 100644 --- a/llvm/lib/Target/ARM/ARMFastISel.cpp +++ b/llvm/lib/Target/ARM/ARMFastISel.cpp @@ -746,7 +746,7 @@ bool ARMFastISel::ARMEmitLoad(EVT VT, unsigned &ResultReg, RC = ARM::GPRRegisterClass; break; case MVT::i8: - Opc = isThumb ? ARM::t2LDRBi12 : ARM::LDRB; + Opc = isThumb ? ARM::t2LDRBi12 : ARM::LDRBi12; RC = ARM::GPRRegisterClass; break; case MVT::i32: @@ -774,8 +774,6 @@ bool ARMFastISel::ARMEmitLoad(EVT VT, unsigned &ResultReg, if (isFloat) Offset /= 4; - // The thumb and floating point instructions both take 2 operands, ARM takes - // another register. AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc), ResultReg) .addReg(Base).addImm(Offset)); |
