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* AMDGPU/GlobalISel: Assume VGPR for G_FRAME_INDEXMatt Arsenault2019-10-021-1/+7
* AMDGPU/GlobalISel: Private loads always use VGPRsMatt Arsenault2019-10-021-4/+6
* AMDGPU/GlobalISel: Legalize 1024-bit G_BUILD_VECTORMatt Arsenault2019-10-021-4/+6
* AMDGPU/GlobalISel: Fix RegBankSelect for 1024-bit valuesMatt Arsenault2019-10-021-29/+35
* [AMDGPU] separate accounting for agprsStanislav Mekhanoshin2019-10-023-7/+52
* AMDGPU: Fix an out of date assert in addressing FrameIndexChangpeng Fang2019-10-011-3/+2
* AMDGPU/SILoadStoreOptimizer: Add helper functions for working with CombineInfoTom Stellard2019-10-011-205/+244
* AMDGPU/GlobalISel: Increase max legal size to 1024Matt Arsenault2019-10-013-10/+13
* [AMDGPU] Add VerifyScheduling support.Jay Foad2019-10-011-0/+18
* AMDGPU/GlobalISel: Select s1 src G_SITOFP/G_UITOFPMatt Arsenault2019-10-014-8/+55
* AMDGPU/GlobalISel: Add support for init.exec intrinsicsMatt Arsenault2019-10-016-20/+42
* AMDGPU/GlobalISel: Allow scc/vcc alternative mappings for s1 constantsMatt Arsenault2019-10-011-1/+15
* AMDGPU/GlobalISel: Avoid creating shift of 0 in arg loweringMatt Arsenault2019-10-011-3/+8
* TLI: Remove DAG argument from getRegisterByNameMatt Arsenault2019-10-012-6/+6
* AMDGPU/GlobalISel: Select G_UADDO/G_USUBOMatt Arsenault2019-10-013-1/+47
* GlobalISel: Implement widenScalar for G_SITOFP/G_UITOFP sourcesMatt Arsenault2019-10-011-3/+9
* AMDGPU/GlobalISel: Legalize G_GLOBAL_VALUEMatt Arsenault2019-10-013-8/+105
* [AMDGPU] SIFoldOperands should not fold register acrocc the EXEC definitionAlexander Timofeev2019-09-301-0/+7
* [Alignment][NFC] Remove AllocaInst::setAlignment(unsigned)Guillaume Chatelet2019-09-301-2/+2
* AMDGPU/GlobalISel: Fix select for v2s16 and/or/xorMatt Arsenault2019-09-301-15/+17
* AMDGPU/GlobalISel: Avoid getting MRI in every functionMatt Arsenault2019-09-282-221/+156
* [AMDGPU][MC] Corrected parsing of registersDmitry Preobrazhensky2019-09-271-144/+208
* [Alignment][NFC] Remove unneeded llvm:: scoping on Align typesGuillaume Chatelet2019-09-274-7/+7
* Remove the AliasAnalysis argument in function areMemAccessesTriviallyDisjointChangpeng Fang2019-09-262-4/+2
* [AMDGPU] copy OtherPredicates from pseudo to VOP3_RealStanislav Mekhanoshin2019-09-261-0/+1
* [TargetLowering] Make allowsMemoryAccess methode virtual.Thomas Raoux2019-09-262-6/+7
* [AMDGPU] gfx10 v_fmac_f16 operand foldingStanislav Mekhanoshin2019-09-251-8/+15
* [TargetInstrInfo] Let findCommutedOpIndices take const MachineInstr&Simon Pilgrim2019-09-252-2/+3
* [Dominators][AMDGPU] Don't use virtual exit node in findNearestCommonDominato...Jakub Kuderski2019-09-251-10/+10
* Add tracing in pickNodeFromQueue.Jay Foad2019-09-251-0/+1
* [NFC] Add { } to silence compiler warning [-Wmissing-braces].Huihui Zhang2019-09-251-1/+1
* [AMDGPU][MC] Corrected handling of relocatable expressionsDmitry Preobrazhensky2019-09-231-11/+20
* [AMDGPU] isSDNodeAlwaysUniform - silence static analyzer dyn_cast<LoadSDNode>...Simon Pilgrim2019-09-221-3/+2
* AMDGPUPrintfRuntimeBinding - silence static analyzer null dereference warning...Simon Pilgrim2019-09-221-3/+2
* AMDGPU/GlobalISel: Allow selection of scalar min/maxMatt Arsenault2019-09-211-4/+4
* Use llvm::StringLiteral instead of StringRef in few placesFangrui Song2019-09-202-19/+7
* [AMDGPU] Use std::make_tuple to make some toolchains happy againBjorn Pettersson2019-09-201-6/+6
* [AMDGPU] fixed underflow in getOccupancyWithNumVGPRsStanislav Mekhanoshin2019-09-191-1/+1
* Reapply r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"Matt Arsenault2019-09-1915-188/+912
* Revert r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"Hans Wennborg2019-09-1915-912/+188
* AMDGPU/SILoadStoreOptimizer: Add const to more functionsTom Stellard2019-09-191-12/+12
* AMDGPU/GlobalISel: RegBankSelect llvm.amdgcn.ds.swizzleMatt Arsenault2019-09-191-0/+1
* AMDGPU/GlobalISel: RegBankSelect tbuffer load/storeMatt Arsenault2019-09-191-6/+14
* AMDGPU/GlobalISel: Select llvm.amdgcn.raw.buffer.store.formatMatt Arsenault2019-09-193-20/+122
* AMDGPU/GlobalISel: Select llvm.amdgcn.raw.buffer.storeMatt Arsenault2019-09-197-11/+455
* AMDGPU/GlobalISel: RegBankSelect struct buffer load/storeMatt Arsenault2019-09-191-0/+22
* AMDGPU/GlobalISel: RegBankSelect llvm.amdgcn.raw.buffer.{load|store}Matt Arsenault2019-09-192-1/+52
* AMDGPU/GlobalISel: Attempt to RegBankSelect image intrinsicsMatt Arsenault2019-09-192-5/+104
* AMDGPU/GlobalISel: Fix RegBankSelect G_SMULH/G_UMULH pre-gfx9Matt Arsenault2019-09-192-3/+11
* GlobalISel: Don't materialize immarg arguments to intrinsicsMatt Arsenault2019-09-199-171/+160
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