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path: root/llvm/lib/Target/AMDGPU/VOPCInstructions.td
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* AMDGPU: Implement llvm.amdgcn.icmp/fcmp for i16/f16Matt Arsenault2018-08-151-0/+26
* [AMDGPU][MC] Corrected default values for unused SDWA operandsDmitry Preobrazhensky2018-03-161-2/+2
* [AMDGPU] Copy impdefs from pseudo to real instructionsStanislav Mekhanoshin2018-01-151-0/+1
* AMDGPU: Remove global isGCN predicatesMatt Arsenault2017-10-031-6/+2
* [AMDGPU] resubmit r308179: CodeGen: check dst operand type to determine if om...Sam Kolton2017-07-181-9/+15
* Revert r308179 which causes tablegen to spam stderr on every build.Chandler Carruth2017-07-181-15/+9
* [AMDGPU] CodeGen: check dst operand type to determine if omod is supported fo...Sam Kolton2017-07-171-9/+15
* [AMDGPU] SDWA: merge VI and GFX9 pseudo instructionsSam Kolton2017-06-211-24/+4
* [AMDGPU] SDWA: Add assembler support for GFX9Sam Kolton2017-05-231-0/+37
* [AMDGPU][MC] Corrected parsing of v_cmp_class* and v_cmpx_class*Dmitry Preobrazhensky2017-04-121-1/+1
* [AMDGPU][MC] Fix for Bug 30829 + LIT testsDmitry Preobrazhensky2017-03-031-0/+2
* [AMDGPU] Add subtarget features for SDWA/DPPSam Kolton2017-01-201-3/+1
* [AMDGPU] Assembler: SDWA/DPP should not accept scalar registers and immediate...Sam Kolton2017-01-111-2/+2
* AMDGPU: Fix missing 16-bit cmpx instructionsMatt Arsenault2016-12-221-0/+39
* AMDGPU: Use i16 comparison instructionsMatt Arsenault2016-12-221-2/+42
* [AMDGPU] Add pseudo SDWA instructionsSam Kolton2016-12-221-24/+38
* [AMDGPU] Disassembler: fix for disaasembling v_mac_f32/16_dpp/sdwaSam Kolton2016-12-221-0/+5
* AMDGPU: Fix missing commute table entries for cmpxMatt Arsenault2016-12-221-4/+4
* [AMDGPU] Add f16 support (VI+)Konstantin Zhuravlyov2016-11-131-140/+230
* AMDGPU: Use unsigned compare for eq/neMatt Arsenault2016-09-301-8/+8
* [AMDGPU] Refactor VOP1 and VOP2 instruction TD definitionsValery Pykhtin2016-09-231-29/+21
* [AMDGPU] Refactor VOPC instruction TD definitionsValery Pykhtin2016-09-191-0/+964
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