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| author | Dmitry Preobrazhensky <dmitry.preobrazhensky@amd.com> | 2017-03-03 14:31:06 +0000 |
|---|---|---|
| committer | Dmitry Preobrazhensky <dmitry.preobrazhensky@amd.com> | 2017-03-03 14:31:06 +0000 |
| commit | 03880f8d247052c6efdf16d3808d294dc726af33 (patch) | |
| tree | 436e813408871006d5487597f432156be7c39f2a /llvm/lib/Target/AMDGPU/VOPCInstructions.td | |
| parent | 9528f8c2fb4b0440914fa9ea93419753551c1870 (diff) | |
| download | bcm5719-llvm-03880f8d247052c6efdf16d3808d294dc726af33.tar.gz bcm5719-llvm-03880f8d247052c6efdf16d3808d294dc726af33.zip | |
[AMDGPU][MC] Fix for Bug 30829 + LIT tests
Added code to check constant bus restrictions for VOP formats (only one SGPR value or literal-constant may be used by the instruction).
Note that the same checks are performed by SIInstrInfo::verifyInstruction (used by lowering code).
Added LIT tests.
llvm-svn: 296873
Diffstat (limited to 'llvm/lib/Target/AMDGPU/VOPCInstructions.td')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/VOPCInstructions.td | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/VOPCInstructions.td b/llvm/lib/Target/AMDGPU/VOPCInstructions.td index bb05fb7bae7..c64a18aaee0 100644 --- a/llvm/lib/Target/AMDGPU/VOPCInstructions.td +++ b/llvm/lib/Target/AMDGPU/VOPCInstructions.td @@ -93,6 +93,8 @@ class VOPC_Real <VOPC_Pseudo ps, int EncodingFamily> : let Constraints = ps.Constraints; let DisableEncoding = ps.DisableEncoding; let TSFlags = ps.TSFlags; + let UseNamedOperandTable = ps.UseNamedOperandTable; + let Uses = ps.Uses; } class VOPC_SDWA_Pseudo <string OpName, VOPProfile P, list<dag> pattern=[]> : |
