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path: root/llvm/lib/Target/AMDGPU/SIDefines.h
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* [AMDGPU] SDWA: merge VI and GFX9 pseudo instructionsSam Kolton2017-06-211-3/+3
* [AMDGPU][MC] New syntax for ds_swizzle_b32 offsetDmitry Preobrazhensky2017-05-311-0/+40
* [AMDGPU] SDWA: add disassembler support for GFX9Sam Kolton2017-05-261-4/+11
* [AMDGPU] SDWA: Add assembler support for GFX9Sam Kolton2017-05-231-1/+11
* AMDGPU: Add AMDGPU_HS calling conventionMarek Olsak2017-05-021-0/+1
* AMDGPU/GFX9: Fix shared and private aperture queriesKonstantin Zhuravlyov2017-04-061-2/+9
* AMDGPU: Add VOP3P instruction formatMatt Arsenault2017-02-271-4/+10
* AMDGPU: Fold FP clamp as modifier bitMatt Arsenault2017-02-221-2/+2
* AMDGPU : Add trap handler support.Wei Ding2017-02-101-1/+3
* AMDGPU: Fix handling of 16-bit immediatesMatt Arsenault2016-12-101-5/+24
* AMDGPU: Clean up instruction bitsMatt Arsenault2016-12-091-56/+62
* AMDGPU: Refactor exp instructionsMatt Arsenault2016-12-051-10/+11
* AMDGPU: Workaround for instruction size with literalsMatt Arsenault2016-11-011-1/+2
* AMDGPU: Add definitions for scalar store instructionsMatt Arsenault2016-10-281-1/+2
* AMDGPU/SI: Handle hazard with s_rfe_b64Tom Stellard2016-10-271-0/+7
* AMDGPU: Add instruction definitions for VGPR indexingMatt Arsenault2016-10-121-0/+9
* [AMDGPU] Assembler: support v_mac_f32 DPP and SDWA. Move getNamedOperandIdx t...Sam Kolton2016-10-071-0/+20
* AMDGPU: Use SOPK compare instructionsMatt Arsenault2016-09-161-1/+2
* Revert "AMDGPU: Use SOPK compare instructions"Matt Arsenault2016-09-141-2/+1
* AMDGPU: Use SOPK compare instructionsMatt Arsenault2016-09-141-1/+2
* AMDGPU: Implement is{LoadFrom|StoreTo}FrameIndexMatt Arsenault2016-09-101-3/+4
* AMDGPU] Assembler: better support for immediate literals in assembler.Sam Kolton2016-09-091-8/+11
* [AMDGPU] Assembler: match e32 VOP instructions before e64.Sam Kolton2016-09-091-0/+9
* AMDGPU: Stay in WQM for non-intrinsic storesNicolai Haehnle2016-08-021-1/+2
* AMDGPU/SI: Emit the number of SGPR and VGPR spillsMarek Olsak2016-07-131-0/+2
* AMDGPU: Treat texture gather instructions more like other MIMG instructionsNicolai Haehnle2016-07-111-1/+2
* AMDGPU: Fix folding SGPRs into madak/madmk src0Matt Arsenault2016-07-051-1/+6
* AMDGPU: Cleanup subtarget handling.Matt Arsenault2016-06-241-1/+1
* [AMDGPU] AsmParser: Support for sext() modifier in SDWA. Some code cleaning i...Sam Kolton2016-06-101-2/+5
* AMDGPU: Fix trailing whitespaceMatt Arsenault2016-06-101-1/+1
* [AMDGPU][llvm-mc] s_getreg/setreg* - hwreg - factor out strings/literals etc.Artem Tamazov2016-05-261-9/+41
* [AMDGPU][llvm-mc] Disassembler: support for TTMP/TBA/TMA registers.Artem Tamazov2016-05-241-0/+23
* [AMDGPU][llvm-mc] Add support for sendmsg(...) syntax.Artem Tamazov2016-05-061-0/+48
* [AMDGPU] Assembler: basic support for SDWA instructionsSam Kolton2016-04-261-11/+12
* AMDGPU: R600 code splitting cleanupMatt Arsenault2016-03-111-2/+2
* [AMDGPU] Assembler: Support DPP instructions.Sam Kolton2016-03-091-10/+11
* AMDGPU/SI: Add new target attribute InitialPSInputAddrMarek Olsak2016-01-131-1/+1
* AMDGPU/SI: Add 64-bit versions of v_nop and v_clrexcpTom Stellard2015-10-061-1/+2
* AMDGPU/SI: Update amd_kernel_code_t definition and add assembler supportTom Stellard2015-06-261-1/+26
* Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)Alexander Kornienko2015-06-231-2/+2
* Fixed/added namespace ending comments using clang-tidy. NFCAlexander Kornienko2015-06-191-2/+2
* R600 -> AMDGPU renameTom Stellard2015-06-131-0/+172
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