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path: root/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
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* [AMDGPU] Change constant addr space to 4Yaxun Liu2018-02-131-1/+1
* Reapply "AMDGPU: Add 32-bit constant address space"Matt Arsenault2018-02-091-1/+1
* Revert "AMDGPU: Add 32-bit constant address space"Rafael Espindola2018-02-071-1/+1
* AMDGPU: Add 32-bit constant address spaceMarek Olsak2018-02-071-1/+1
* [AMDGPU] Suppress redundant waitcnt instrs.Mark Searles2018-02-071-1/+1
* [AMDGPU] Switch to the new addr space mapping by defaultYaxun Liu2018-02-021-9/+0
* [NFC] fix trivial typos in comments and documentsHiroshi Inoue2018-01-291-1/+1
* Split MachineLICM into EarlyMachineLICM and MachineLICM; NFCMatthias Braun2018-01-191-1/+1
* (Re-landing) Expose a TargetMachine::getTargetTransformInfo functionSanjoy Das2017-12-221-5/+3
* Revert "Expose a TargetMachine::getTargetTransformInfo function"Sanjoy Das2017-12-211-3/+5
* Expose a TargetMachine::getTargetTransformInfo functionSanjoy Das2017-12-211-5/+3
* AMDGPU: Partial ILP scheduler port from SelectionDAG to SchedulingDAG (experi...Valery Pykhtin2017-11-201-0/+15
* Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie2017-11-171-1/+1
* [AMDGPU] Change alloca addr space of r600 to 5 for amdgiz environmentYaxun Liu2017-11-061-0/+4
* [AMDGPU] Clean up symbols in the global namespace.Benjamin Kramer2017-10-311-1/+1
* Revert "TargetMachine: Merge TargetMachine and LLVMTargetMachine"Matthias Braun2017-10-121-6/+6
* TargetMachine: Merge TargetMachine and LLVMTargetMachineMatthias Braun2017-10-121-6/+6
* AMDGPU: Fix incorrect selection of pseudo-branchesMatt Arsenault2017-10-101-2/+4
* [AMDGPU] Lower enqueued blocks and generate runtime metadataYaxun Liu2017-10-101-0/+4
* [AMDGPU] Set fast-math flags on functions given the optionsStanislav Mekhanoshin2017-09-291-3/+4
* [AMDGPU] Fixed memory leak with inliner replacedStanislav Mekhanoshin2017-09-201-1/+3
* [AMDGPU] Fix regression in test clang/test/CodeGen/backend-unsupported-error.llStanislav Mekhanoshin2017-09-201-1/+2
* [AMDGPU] Port of HSAIL inlinerStanislav Mekhanoshin2017-09-201-1/+4
* AMDGPU: Run internalize symbols at -O0Matt Arsenault2017-09-191-21/+21
* [AMDGPU] Ported and adopted AMDLibCalls passStanislav Mekhanoshin2017-08-111-6/+19
* AMDGPU: Move R600 parts of AMDGPUISelDAGToDAG into their own classTom Stellard2017-08-081-0/+6
* AMDGPU: Remove redundant opt level checkMatt Arsenault2017-08-071-2/+1
* AMDGPU: Remove FixControlFlowLiveIntervals passMatt Arsenault2017-08-071-5/+0
* AMDGPU: Cleanup subtarget featuresMatt Arsenault2017-08-071-2/+1
* [AMDGPU] Add support for Whole Wavefront ModeConnor Abbott2017-08-041-0/+9
* AMDGPU: Remove error on calls for amdgcnMatt Arsenault2017-08-031-16/+16
* AMDGPU: Add analysis pass for function argument infoMatt Arsenault2017-08-031-1/+3
* [GlobalISel] Make GlobalISel a non-optional library.Quentin Colombet2017-08-031-5/+0
* Delete Default and JITDefault code modelsRafael Espindola2017-08-031-8/+17
* AMDGPU/R600: Initialize more passesTom Stellard2017-08-021-0/+5
* AMDGPU: Analyze callee resource usage in AsmPrinterMatt Arsenault2017-08-021-1/+4
* [AMDGPU] Collapse adjacent SI_END_CFStanislav Mekhanoshin2017-08-011-0/+4
* AMDGPU: Initial implementation of callsMatt Arsenault2017-08-011-0/+11
* AMDGPU: Add pass to replace out argumentsMatt Arsenault2017-07-281-0/+1
* AMDGPU: Implement memory modelKonstantin Zhuravlyov2017-07-211-0/+2
* AMDGPU: Add macro fusion schedule DAG mutationMatt Arsenault2017-07-061-0/+2
* [AMDGPU] Move GISel accessor initialization from TargetMachine to Subtarget.Quentin Colombet2017-07-051-43/+0
* [AMDGPU] Switch scalarize global loads ON by defaultAlexander Timofeev2017-07-041-1/+1
* Revert r307026, "[AMDGPU] Switch scalarize global loads ON by default"NAKAMURA Takumi2017-07-041-1/+1
* [AMDGPU] Switch scalarize global loads ON by defaultAlexander Timofeev2017-07-031-1/+1
* AMDGPU: Remove SITypeRewriterMatt Arsenault2017-06-281-1/+0
* [AMDGPU] Add infer address spaces pass before SROAStanislav Mekhanoshin2017-06-191-0/+8
* Sort the remaining #include lines in include/... and lib/....Chandler Carruth2017-06-061-8/+8
* [AMDGPU] Untangle SDWA pass from SIShrinkInstructionsStanislav Mekhanoshin2017-06-031-1/+1
* AMDGPU: Register AMDGPUAlwaysInlineMatt Arsenault2017-06-021-0/+1
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