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path: root/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
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* AMDGPU: R600 code splitting cleanupMatt Arsenault2016-03-111-2/+2
* AMDGPU: Insert two S_NOP instructions for every high level source statement.Tom Stellard2016-03-031-0/+11
* AMDGPU/SI: Detect uniform branches and emit s_cbranch instructionsTom Stellard2016-02-121-5/+5
* AMDGPU: Initialize SILowerControlFlowMatt Arsenault2016-02-121-1/+2
* AMDGPU: Fix ordering of CPU and FS parameters in TargetMachine constructorsTom Stellard2016-02-051-4/+4
* AMDGPU/SI: Correctly initialize SIInsertWaits passTom Stellard2016-02-051-1/+2
* AMDGPU: Skip promote alloca with no optimizationsMatt Arsenault2016-02-021-1/+1
* AMDGPU: Fix emitting invalid workitem intrinsics for HSAMatt Arsenault2016-01-301-2/+4
* AMDGPU: Fix default device handlingMatt Arsenault2016-01-271-2/+16
* AMDGPU/SI: Pass whether to use the SI scheduler via Target AttributeTom Stellard2016-01-211-0/+2
* Correctly initialize SIAnnotateControlFlowTom Stellard2016-01-201-0/+1
* AMDGPU/SI: Add SI Machine SchedulerNicolai Haehnle2016-01-131-2/+6
* AMDGPU/SI: Select constant loads with non-uniform addresses to MUBUF instruct...Tom Stellard2015-12-151-0/+3
* AMDGPU/SI: Emit constant arrays in the .text sectionTom Stellard2015-12-101-2/+2
* AMDGPU: Remove SIPrepareScratchRegsMatt Arsenault2015-11-301-1/+0
* AMDGPU: Add pass to detect used kernel featuresMatt Arsenault2015-11-061-0/+8
* AMDGPU: Initialize SIFixSGPRCopies so -print-after worksMatt Arsenault2015-11-031-1/+2
* AMDGPU: Register some more passes so -print-before worksMatt Arsenault2015-10-121-0/+2
* CodeGen: print and verify after TargetPassConfig::insertPass by defaultJustin Bogner2015-10-081-1/+3
* AMDGPU: Properly register passesMatt Arsenault2015-10-071-2/+2
* AMDGPU: Move SIFixSGPRLiveRanges to be a regalloc passMatt Arsenault2015-10-011-1/+17
* AMDGPU/SI: Use .hsatext section instead of .text for HSATom Stellard2015-09-251-4/+10
* AMDGPU: Disable some passes that are not meaningfulMatt Arsenault2015-09-251-3/+15
* constify the Function parameter to the TTI creation callback andEric Christopher2015-09-161-1/+1
* AMDGPU: Make sure to run verifier after SIFixSGPRLiveRangesMatt Arsenault2015-08-221-1/+1
* AMDGPU: Add pass to lower OpenCL image and sampler arguments.Tom Stellard2015-08-071-0/+2
* AMDGPU/SI: Fix read2 merging into a super register.Matt Arsenault2015-07-141-0/+1
* Make TargetTransformInfo keeping a reference to the Module DataLayoutMehdi Amini2015-07-091-2/+4
* AMDGPU: Run SIInsertWaits as pre-emit passMatt Arsenault2015-07-061-1/+1
* R600 -> AMDGPU renameTom Stellard2015-06-131-0/+292
* Revert "AMDGPU: Add core backend files for R600/SI codegen v6"Tom Stellard2012-07-161-162/+0
* AMDGPU: Add core backend files for R600/SI codegen v6Tom Stellard2012-07-161-0/+162
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