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path: root/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
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* AMDGPU/GlobalISel: Select private loadsMatt Arsenault2019-07-161-1/+135
* AMDGPU/GlobalISel: Select flat storesMatt Arsenault2019-07-161-2/+4
* AMDGPU/GlobalISel: Select flat loadsMatt Arsenault2019-07-161-44/+52
* AMDGPU/GlobalISel: Fix test failures in release buildMatt Arsenault2019-07-161-2/+5
* AMDGPU/GlobalISel: Select G_AND/G_OR/G_XORMatt Arsenault2019-07-151-0/+65
* AMDGPU/GlobalISel: Don't constrain source register of VCC copiesMatt Arsenault2019-07-151-0/+20
* AMDGPU/GlobalISel: Fix selecting vcc->vcc bank copiesMatt Arsenault2019-07-151-10/+12
* AMDGPU/GlobalISel: Fix not constraining result reg of copies to VCCMatt Arsenault2019-07-151-0/+4
* AMDGPU/GlobalISel: Fix handling of sgpr (not scc bank) s1 to VCCMatt Arsenault2019-07-151-17/+23
* AMDGPU/GlobalISel: Fix G_ICMP for wave32Matt Arsenault2019-07-151-2/+2
* AMDGPU/GlobalISel: Handle llvm.amdgcn.if.breakMatt Arsenault2019-07-151-0/+25
* AMDGPU/GlobalISel: Select llvm.amdgcn.end.cfMatt Arsenault2019-07-151-0/+14
* AMDGPU/GlobalISel: Select easy cases for G_BUILD_VECTORMatt Arsenault2019-07-151-0/+4
* AMDGPU/GlobalISel: Select G_SUBMatt Arsenault2019-07-091-6/+14
* AMDGPU/GlobalISel: Select G_UNMERGE_VALUESMatt Arsenault2019-07-091-0/+46
* AMDGPU/GlobalISel: Select G_MERGE_VALUESMatt Arsenault2019-07-091-0/+41
* AMDGPU/GlobalISel: Try generated matcher with intrinsicsMatt Arsenault2019-07-021-8/+7
* AMDGPU/GlobalISel: Fix G_GEP with mixed SGPR/VGPR operandsMatt Arsenault2019-07-021-4/+6
* AMDGPU/GlobalISel: Select G_FENCEMatt Arsenault2019-07-021-0/+5
* AMDGPU/GlobalISel: Lower kernarg segment ptr intrinsicsMatt Arsenault2019-07-011-20/+0
* AMDGPU/GlobalISel: Fail instead of assert when selecting loadsMatt Arsenault2019-07-011-5/+11
* AMDGPU/GlobalISel: Complete implementation of G_GEPMatt Arsenault2019-07-011-29/+76
* AMDGPU/GlobalISel: Select G_PHIMatt Arsenault2019-07-011-0/+40
* AMDGPU/GlobalISel: Implement select for 32-bit G_ADDTom Stellard2019-07-011-2/+4
* AMDGPU/GlobalISel: Select G_BRCOND for vccMatt Arsenault2019-07-011-25/+41
* AMDGPU/GlobalISel: Select G_FRAME_INDEXMatt Arsenault2019-07-011-0/+18
* AMDGPU/GlobalISel: Make s16 select legalMatt Arsenault2019-07-011-5/+7
* AMDGPU/GlobalISel: Select G_BRCOND for scc conditionsMatt Arsenault2019-07-011-0/+33
* AMDGPU/GlobalISel: Tolerate copies with no type setMatt Arsenault2019-07-011-3/+6
* AMDGPU/GlobalISel: Select src modifiersMatt Arsenault2019-07-011-6/+40
* AMDGPU/GlobalISel: Fail on store to 32-bit address spaceMatt Arsenault2019-07-011-0/+6
* AMDGPU/GlobalISel: Improve icmp selection coverage.Matt Arsenault2019-07-011-13/+36
* AMDGPU/GlobalISel: Fix scc->vcc copy handlingMatt Arsenault2019-07-011-11/+21
* AMDGPU/GlobalISel: Use and instead of BFE with inline immediateMatt Arsenault2019-07-011-6/+29
* AMDGPU: Select G_SEXT/G_ZEXT/G_ANYEXTMatt Arsenault2019-06-251-4/+133
* AMDGPU/GlobalISel: Select G_TRUNCMatt Arsenault2019-06-241-0/+72
* AMDGPU/GlobalISel: Fix selecting G_IMPLICIT_DEF for s1Matt Arsenault2019-06-241-6/+11
* AMDGPU/GlobalISel: Account for multiple defs when finding intrinsic IDMatt Arsenault2019-06-171-2/+1
* AMDGPU/GlobalISel: Implement select for G_ICMP and G_SELECTTom Stellard2019-06-171-0/+187
* [AMDGPU] gfx1010 VMEM and SMEM implementationStanislav Mekhanoshin2019-04-301-2/+4
* AMDGPU/GlobalISel: Implement select for G_INSERTTom Stellard2019-03-011-0/+30
* AMDGPU/GlobalISel: Implement select for G_EXTRACTTom Stellard2019-02-281-0/+24
* AMDGPU/GlobalISel: Move SMRD selection logic to TableGenTom Stellard2019-02-201-127/+82
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* Revert "AMDGPU/GlobalISel: Implement select for G_INSERT"Tom Stellard2018-10-111-30/+0
* AMDGPU/GlobalISel: Implement select for G_INSERTTom Stellard2018-10-111-0/+30
* AMDGPU/GlobalISel: Add support for G_INTTOPTRTom Stellard2018-10-051-0/+1
* AMDGPU: Remove remnants of old address space mappingMatt Arsenault2018-08-311-3/+2
* AMDGPU/GlobalISel: Implement select() for 32-bit @llvm.minnun and @llvm.maxnumTom Stellard2018-07-131-0/+2
* AMDGPU/GlobalISel: Implement select() for @llvm.amdgcn.expTom Stellard2018-07-131-0/+69
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