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path: root/llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp
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* [AMDGPU] SDWA: merge VI and GFX9 pseudo instructionsSam Kolton2017-06-211-2/+9
* [AMDGPU] Get address space mapping by target triple environmentYaxun Liu2017-03-271-1/+1
* AMDGPU: Merge initial gfx9 supportMatt Arsenault2017-02-181-0/+1
* MachineScheduler: Export function to construct "default" scheduler.Matthias Braun2016-11-281-8/+0
* AMDGPU: Enable store clusteringMatt Arsenault2016-11-151-0/+4
* [AMDGPU] Assembler: support v_mac_f32 DPP and SDWA. Move getNamedOperandIdx t...Sam Kolton2016-10-071-1/+0
* AMDGPU: Move R600 only pieces into R600 classesMatt Arsenault2016-07-091-57/+0
* Fix "not all control paths return a value" warning on MSVCSimon Pilgrim2016-06-271-0/+2
* AMDGPU: Cleanup subtarget handling.Matt Arsenault2016-06-241-22/+27
* [AMDGPU] Remove exit-on-error in test (PR27761)Diana Picus2016-06-231-1/+3
* AMDGPU: Move subtarget specific code out of AMDGPUInstrInfo.cppTom Stellard2016-01-281-209/+0
* Make a bunch of static arrays const.Craig Topper2015-10-181-1/+1
* Remove redundant TargetFrameLowering::getFrameIndexOffset virtualJames Y Knight2015-08-151-1/+3
* Fix broken ArrayRef conversion from r243497.Alex Lorenz2015-07-281-1/+1
* MIR Serialization: Serialize the target index machine operands.Alex Lorenz2015-07-281-0/+11
* Remove TargetInstrInfo::canFoldMemoryOperandSimon Pilgrim2015-07-191-5/+0
* R600 -> AMDGPU renameTom Stellard2015-06-131-0/+369
* Revert "AMDGPU: Add core backend files for R600/SI codegen v6"Tom Stellard2012-07-161-46/+0
* AMDGPU: Add core backend files for R600/SI codegen v6Tom Stellard2012-07-161-0/+46
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