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path: root/llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp
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* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* AMDGPU: Refactor Subtarget classesTom Stellard2018-07-111-1/+1
* AMDGPU: Separate R600 and GCN TableGen filesTom Stellard2018-06-281-99/+3
* AMDGPU: Select MIMG instructions manually in SITargetLoweringNicolai Haehnle2018-06-211-3/+2
* AMDGPU: Use generic tables instead of SearchableTableNicolai Haehnle2018-06-211-2/+2
* AMDGPU: Turn D16 for MIMG instructions into a regular operandNicolai Haehnle2018-06-211-2/+1
* AMDGPU: Remove #include "MCTargetDesc/AMDGPUMCTargetDesc.h" from common headersTom Stellard2018-05-221-0/+1
* Remove \brief commands from doxygen comments.Adrian Prantl2018-05-011-1/+1
* AMDGPU: Dimension-aware image intrinsicsNicolai Haehnle2018-04-041-0/+3
* AMDGPU: Make getTgtMemIntrinsic table-driven for resource-based intrinsicsNicolai Haehnle2018-04-011-0/+7
* Reapply "AMDGPU: Add 32-bit constant address space"Matt Arsenault2018-02-091-0/+3
* AMDGPU: Fix layering issueMatt Arsenault2018-02-091-0/+18
* AMDGPU/SI: Adjust the encoding family for D16 buffer instructions when the ta...Changpeng Fang2018-02-011-0/+6
* AMDGPU/SI: Add d16 support for buffer intrinsics.Changpeng Fang2018-01-121-1/+2
* AMDGPU: Partially fix disassembly of MIMG instructionsMatt Arsenault2017-12-131-65/+0
* AMDGPU: Fix creating invalid copy when adjusting dmaskMatt Arsenault2017-12-041-6/+50
* [AMDGPU][MC][GFX8][GFX9] Corrected names of integer v_{add/addc/sub/subrev/su...Dmitry Preobrazhensky2017-11-201-4/+5
* [AMDGPU][MC][GFX9] Added 16-bit renamed and "_legacy" VALU opcodesDmitry Preobrazhensky2017-08-091-1/+6
* AMDGPU: Initial implementation of callsMatt Arsenault2017-08-011-1/+3
* [AMDGPU] SDWA: merge VI and GFX9 pseudo instructionsSam Kolton2017-06-211-2/+9
* [AMDGPU] Get address space mapping by target triple environmentYaxun Liu2017-03-271-1/+1
* AMDGPU: Merge initial gfx9 supportMatt Arsenault2017-02-181-0/+1
* MachineScheduler: Export function to construct "default" scheduler.Matthias Braun2016-11-281-8/+0
* AMDGPU: Enable store clusteringMatt Arsenault2016-11-151-0/+4
* [AMDGPU] Assembler: support v_mac_f32 DPP and SDWA. Move getNamedOperandIdx t...Sam Kolton2016-10-071-1/+0
* AMDGPU: Move R600 only pieces into R600 classesMatt Arsenault2016-07-091-57/+0
* Fix "not all control paths return a value" warning on MSVCSimon Pilgrim2016-06-271-0/+2
* AMDGPU: Cleanup subtarget handling.Matt Arsenault2016-06-241-22/+27
* [AMDGPU] Remove exit-on-error in test (PR27761)Diana Picus2016-06-231-1/+3
* AMDGPU: Move subtarget specific code out of AMDGPUInstrInfo.cppTom Stellard2016-01-281-209/+0
* Make a bunch of static arrays const.Craig Topper2015-10-181-1/+1
* Remove redundant TargetFrameLowering::getFrameIndexOffset virtualJames Y Knight2015-08-151-1/+3
* Fix broken ArrayRef conversion from r243497.Alex Lorenz2015-07-281-1/+1
* MIR Serialization: Serialize the target index machine operands.Alex Lorenz2015-07-281-0/+11
* Remove TargetInstrInfo::canFoldMemoryOperandSimon Pilgrim2015-07-191-5/+0
* R600 -> AMDGPU renameTom Stellard2015-06-131-0/+369
* Revert "AMDGPU: Add core backend files for R600/SI codegen v6"Tom Stellard2012-07-161-46/+0
* AMDGPU: Add core backend files for R600/SI codegen v6Tom Stellard2012-07-161-0/+46
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