summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/AMDGPU/AMDGPUGISel.td
Commit message (Expand)AuthorAgeFilesLines
* AMDGPU/GlobalISel: Complete implementation of G_GEPMatt Arsenault2019-07-011-23/+0
* AMDGPU/GlobalISel: Try to select VOP3 form of addMatt Arsenault2019-07-011-0/+20
* AMDGPU/GlobalISel: Implement select for 32-bit G_ADDTom Stellard2019-07-011-0/+3
* [AMDGPU] predicate and feature refactoringStanislav Mekhanoshin2019-04-051-1/+1
* Revert "AMDGPU/NFC: Cleanup subtarget predicates"Konstantin Zhuravlyov2019-02-221-1/+1
* AMDGPU/NFC: Cleanup subtarget predicatesKonstantin Zhuravlyov2019-02-211-1/+1
* AMDGPU/GlobalISel: Move SMRD selection logic to TableGenTom Stellard2019-02-201-0/+24
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* AMDGPU/GlobalISel: Select amdgcn.cvt.pkrtz to 64-bit instructionsTom Stellard2018-10-081-3/+2
* AMDGPU/GlobalISel: Implement select() for 32-bit @llvm.minnun and @llvm.maxnumTom Stellard2018-07-131-0/+17
* AMDGPU/GlobalISel: legalize and select 32-bit G_ASHRTom Stellard2018-06-221-0/+34
* AMDGPU/GlobalISel: legalize and select 32-bit G_SITOFPTom Stellard2018-06-221-0/+4
* AMDGPU/GlobalISel: Implement select() for @llvm.amdgcn.cvt.pkrtzTom Stellard2018-06-141-0/+33
* AMDGPU/GlobalISel: Implement select() for 32-bit G_FADD and G_FMULTom Stellard2018-06-131-0/+4
* AMDGPU/GlobalISel: Implement select() for 32-bit G_FPTOUITom Stellard2018-05-111-0/+4
* AMDGPU/GlobalISel: Enable TableGen'd instruction selectorTom Stellard2018-05-101-0/+42
OpenPOWER on IntegriCloud