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| author | Tom Stellard <tstellar@redhat.com> | 2019-07-01 16:09:33 +0000 |
|---|---|---|
| committer | Tom Stellard <tstellar@redhat.com> | 2019-07-01 16:09:33 +0000 |
| commit | 9e9dd30de3a445152bff09b15439a18f4546a5ba (patch) | |
| tree | 1f86907259b43ef730d4875d435fcfda7a394d5a /llvm/lib/Target/AMDGPU/AMDGPUGISel.td | |
| parent | 8b2e304bc57ce6390f6b8ef8642e5906a645fe09 (diff) | |
| download | bcm5719-llvm-9e9dd30de3a445152bff09b15439a18f4546a5ba.tar.gz bcm5719-llvm-9e9dd30de3a445152bff09b15439a18f4546a5ba.zip | |
AMDGPU/GlobalISel: Implement select for 32-bit G_ADD
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: hiraditya, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, Petar.Avramovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D58804
llvm-svn: 364797
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPUGISel.td')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUGISel.td | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUGISel.td b/llvm/lib/Target/AMDGPU/AMDGPUGISel.td index 6f725d60907..accb8eac9f0 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUGISel.td +++ b/llvm/lib/Target/AMDGPU/AMDGPUGISel.td @@ -128,6 +128,9 @@ multiclass GISelVop2IntrPat < def : GISelSop2Pat <or, S_OR_B32, i32>; def : GISelVop2Pat <or, V_OR_B32_e32, i32>; +def : GISelSop2Pat <add, S_ADD_I32, i32>; +def : GISelVop2Pat <add, V_ADD_I32_e32, i32>; + def : GISelSop2Pat <sra, S_ASHR_I32, i32>; let AddedComplexity = 100 in { let SubtargetPredicate = isGFX6GFX7 in { |
