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path: root/llvm/lib/Target/AMDGPU/AMDGPU.h
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* Revert "[AMDGPU] Invert the handling of skip insertion."Nicolai Hähnle2020-02-031-3/+0
* [AMDGPU] Invert the handling of skip insertion.cdevadas2020-01-151-0/+3
* [IR] Split out target specific intrinsic enums into separate headersReid Kleckner2019-12-111-0/+2
* [AMDGPU] Printf runtime binding passStanislav Mekhanoshin2019-08-121-0/+4
* AMDGPU: Add pass to lower SGPR spillsMatt Arsenault2019-07-031-0/+3
* [AMDGPU] gfx1010 wavefrontsize intrinsic foldingStanislav Mekhanoshin2019-06-171-1/+2
* [AMDGPU] Pass to propagate ABI attributes from kernels to the functionsStanislav Mekhanoshin2019-06-171-0/+8
* [AMDGPU] Create a TargetInfo header. NFCRichard Trieu2019-05-141-3/+0
* [AMDGPU] gfx1010 GCNRegBankReassign passStanislav Mekhanoshin2019-05-011-0/+3
* [AMDGPU] gfx1010 GCNNSAReassign passStanislav Mekhanoshin2019-05-011-0/+3
* [AMDGPU] Pre-allocate WWM registers to reduce VGPR pressure.Neil Henning2019-04-011-3/+3
* [AMDGPU] Add an experimental buffer fat pointer address space.Neil Henning2019-03-181-5/+7
* AMDGPU: Remove debugger related subtarget featuresMatt Arsenault2019-02-211-4/+0
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* AMDGPU: Add llvm.amdgcn.ds.ordered.add & swapMarek Olsak2019-01-161-1/+1
* [AMDGPU] Add support for TFE/LWE in image intrinsics. 2nd tryDavid Stuttard2019-01-141-0/+4
* [AMDGPU] Add new Mode Register passTim Corringham2018-12-101-0/+4
* [AMDGPU] Combine DPP mov with use instructions (VOP1/2/3)Valery Pykhtin2018-11-301-0/+4
* Revert r347871 "Fix: Add support for TFE/LWE in image intrinsic"David Stuttard2018-11-291-4/+0
* Add support for TFE/LWE in image intrinsicsDavid Stuttard2018-11-291-0/+4
* [AMDGPU] Add FixupVectorISel pass, currently Supports SREGs in GLOBAL LD/STRon Lieberman2018-11-161-0/+4
* Allow subclassing ExternalAAMatt Arsenault2018-11-071-0/+2
* [AMDGPU] Add a pass to promote bitcast callsScott Linder2018-10-261-0/+4
* [AMDGPU] Add an AMDGPU specific atomic optimizer.Neil Henning2018-10-081-0/+4
* Remove unnecessary semicolon to silence -Wpedantic warning. NFCI.Simon Pilgrim2018-09-031-1/+1
* AMDGPU: Remove remnants of old address space mappingMatt Arsenault2018-08-311-14/+5
* AMDGPU: bump AS.MAX_COMMON_ADDRESS to 6 since 32-bit addr spaceSamuel Pitoiset2018-08-221-1/+1
* Revert "AMDGPU: bump AS.MAX_COMMON_ADDRESS to 6 since 32-bit addr space"Vitaly Buka2018-08-201-1/+1
* AMDGPU: bump AS.MAX_COMMON_ADDRESS to 6 since 32-bit addr spaceSamuel Pitoiset2018-08-201-1/+1
* AMDGPU: Add pass to lower kernel arguments to loadsMatt Arsenault2018-06-261-0/+4
* [AMDGPU] Construct memory clauses before RAStanislav Mekhanoshin2018-05-311-0/+4
* [AMDGPU] Add perf hints to functionsStanislav Mekhanoshin2018-05-251-0/+3
* AMDGPU: Remove #include "MCTargetDesc/AMDGPUMCTargetDesc.h" from common headersTom Stellard2018-05-221-1/+0
* AMDGPU: Add pass to optimize reqd_work_group_sizeMatt Arsenault2018-05-181-0/+4
* AMDGPU: Rename OpenCL lowering pass to be R600 specific.Matt Arsenault2018-05-131-1/+1
* [AMDGPU][Waitcnt] Remove the old waitcnt passMark Searles2018-05-071-4/+0
* [AMDGPU] Change constant addr space to 4Yaxun Liu2018-02-131-1/+1
* Reapply "AMDGPU: Add 32-bit constant address space"Matt Arsenault2018-02-091-0/+3
* Revert "AMDGPU: Add 32-bit constant address space"Rafael Espindola2018-02-071-3/+0
* AMDGPU: Add 32-bit constant address spaceMarek Olsak2018-02-071-0/+3
* [AMDGPU] Clean up symbols in the global namespace.Benjamin Kramer2017-10-311-33/+38
* [AMDGPU] Lower enqueued blocks and generate runtime metadataYaxun Liu2017-10-101-0/+4
* [AMDGPU] Set fast-math flags on functions given the optionsStanislav Mekhanoshin2017-09-291-1/+2
* [AMDGPU] Port of HSAIL inlinerStanislav Mekhanoshin2017-09-201-0/+3
* [AMDGPU] Ported and adopted AMDLibCalls passStanislav Mekhanoshin2017-08-111-0/+8
* AMDGPU: Move R600 parts of AMDGPUISelDAGToDAG into their own classTom Stellard2017-08-081-0/+1
* AMDGPU: Remove FixControlFlowLiveIntervals passMatt Arsenault2017-08-071-3/+0
* [AMDGPU] Add support for Whole Wavefront ModeConnor Abbott2017-08-041-0/+4
* AMDGPU: Add analysis pass for function argument infoMatt Arsenault2017-08-031-2/+7
* AMDGPU/R600: Initialize more passesTom Stellard2017-08-021-0/+15
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