| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| ... | |
| * | [AArch64] Add pass to remove redundant copy after RA | Jun Bum Lim | 2016-02-16 | 1 | -0/+9 |
| * | [AArch64] Plug the beginning of the GlobalISel pipeline. | Quentin Colombet | 2016-02-11 | 1 | -0/+13 |
| * | constify the Function parameter to the TTI creation callback and | Eric Christopher | 2015-09-16 | 1 | -1/+1 |
| * | [AArch64] Lower interleaved memory accesses to ldN/stN intrinsics. This patch... | Hao Liu | 2015-06-26 | 1 | -0/+4 |
| * | Clean up redundant copies of Triple objects. NFC | Daniel Sanders | 2015-06-16 | 1 | -7/+7 |
| * | [AArch64] Revert r239711 again. We need to discuss how to share code between ... | Hao Liu | 2015-06-15 | 1 | -8/+0 |
| * | [AArch64] Match interleaved memory accesses into ldN/stN instructions. | Hao Liu | 2015-06-15 | 1 | -0/+8 |
| * | Replace string GNU Triples with llvm::Triple in TargetMachine. NFC. | Daniel Sanders | 2015-06-11 | 1 | -13/+11 |
| * | This reverts commit r239529 and r239514. | Rafael Espindola | 2015-06-11 | 1 | -8/+0 |
| * | Replace string GNU Triples with llvm::Triple in computeDataLayout(). NFC. | Daniel Sanders | 2015-06-11 | 1 | -5/+4 |
| * | [AArch64] Match interleaved memory accesses into ldN/stN instructions. | Hao Liu | 2015-06-11 | 1 | -0/+8 |
| * | Replace string GNU Triples with llvm::Triple in MCSubtargetInfo and create*MC... | Daniel Sanders | 2015-06-10 | 1 | -1/+2 |
| * | [GlobalMerge] Take into account minsize on Global users' parents. | Ahmed Bougacha | 2015-06-04 | 1 | -3/+7 |
| * | [AArch64] Disable complex GEP optimization by default. | James Molloy | 2015-04-22 | 1 | -1/+1 |
| * | [CodeGen] Split -enable-global-merge into ARM and AArch64 options. | Ahmed Bougacha | 2015-04-11 | 1 | -1/+8 |
| * | [AArch64, ARM] Enable GlobalMerge with -O3 rather than -O1. | Ahmed Bougacha | 2015-03-23 | 1 | -1/+1 |
| * | Remove the bare getSubtargetImpl call from the AArch64 port. As part | Eric Christopher | 2015-03-21 | 1 | -1/+0 |
| * | Revert "Migrate the AArch64 TargetRegisterInfo to its TargetMachine" | Eric Christopher | 2015-03-18 | 1 | -1/+0 |
| * | Migrate the AArch64 TargetRegisterInfo to its TargetMachine | Eric Christopher | 2015-03-12 | 1 | -0/+1 |
| * | Fix comment formatting. | Eric Christopher | 2015-03-12 | 1 | -2/+1 |
| * | Move the DataLayout to the generic TargetMachine, making it mandatory. | Mehdi Amini | 2015-03-12 | 1 | -9/+17 |
| * | Remove subtarget dependence in pass pipeline setup for AArch64. | Eric Christopher | 2015-03-03 | 1 | -4/+1 |
| * | Rewrite the global merge pass to be subprogram agnostic for now. | Eric Christopher | 2015-02-23 | 1 | -1/+4 |
| * | AArch64: Canonicalize access to function attributes, NFC | Duncan P. N. Exon Smith | 2015-02-14 | 1 | -5/+2 |
| * | [PM] Remove the old 'PassManager.h' header file at the top level of | Chandler Carruth | 2015-02-13 | 1 | -1/+1 |
| * | [multiversion] Switch all of the targets over to use the | Chandler Carruth | 2015-02-01 | 1 | -2/+4 |
| * | [PM] Switch the TargetMachine interface from accepting a pass manager | Chandler Carruth | 2015-01-31 | 1 | -2/+3 |
| * | [PM] Change the core design of the TTI analysis to use a polymorphic | Chandler Carruth | 2015-01-31 | 1 | -4/+0 |
| * | Remove a few getSubtarget calls in AArch64 pass manager initialization. | Eric Christopher | 2015-01-30 | 1 | -2/+2 |
| * | Move DataLayout back to the TargetMachine from TargetSubtargetInfo | Eric Christopher | 2015-01-26 | 1 | -0/+7 |
| * | Enable MachineVerifier in debug mode for X86, ARM, AArch64, Mips. | Matthias Braun | 2014-12-11 | 1 | -5/+5 |
| * | [CodeGen] Add print and verify pass after each MachineFunctionPass by default | Matthias Braun | 2014-12-11 | 1 | -17/+13 |
| * | This reverts commit r224043 and r224042. | Rafael Espindola | 2014-12-11 | 1 | -8/+12 |
| * | Enable machineverifier in debug mode for X86, ARM, AArch64, Mips | Matthias Braun | 2014-12-11 | 1 | -5/+5 |
| * | [CodeGen] Add print and verify pass after each MachineFunctionPass by default | Matthias Braun | 2014-12-11 | 1 | -17/+13 |
| * | Add out of line virtual destructors to all LLVMTargetMachine subclasses | Reid Kleckner | 2014-11-20 | 1 | -0/+2 |
| * | [AArch64] Enable SeparateConstOffsetFromGEP, EarlyCSE and LICM passes on AArc... | Hao Liu | 2014-11-19 | 1 | -0/+18 |
| * | This patch changes the ownership of TLOF from TargetLoweringBase to TargetMac... | Aditya Nandakumar | 2014-11-13 | 1 | -0/+12 |
| * | AArch64: enable Cortex-A57 FP balancing on Cortex-A53. | Tim Northover | 2014-10-28 | 1 | -1/+2 |
| * | [PBQP] Teach PassConfig to tell if the default register allocator is used. | Arnaud A. de Grandmaison | 2014-10-21 | 1 | -13/+2 |
| * | [AArch64] Add workaround for Cortex-A53 erratum (835769) | Bradley Smith | 2014-10-13 | 1 | -0/+7 |
| * | [PBQP] Replace PBQPBuilder with composable constraints (PBQPRAConstraint). | Lang Hames | 2014-10-09 | 1 | -1/+1 |
| * | Add subtarget caches to aarch64, arm, ppc, and x86. | Eric Christopher | 2014-10-06 | 1 | -1/+28 |
| * | [AArch64] Don't enable the post-RA MI scheduler at OptNone. | Chad Rosier | 2014-09-12 | 1 | -1/+2 |
| * | [AArch64] Enable post-RA MI scheduler. | Chad Rosier | 2014-09-12 | 1 | -1/+3 |
| * | [AArch64] Add experimental PBQP support | Arnaud A. de Grandmaison | 2014-09-10 | 1 | -2/+14 |
| * | [AArch64] Add pass to enable additional comparison optimizations by CSE. | Jiangning Liu | 2014-09-05 | 1 | -0/+7 |
| * | Rename AtomicExpandLoadLinked into AtomicExpand | Robin Morisset | 2014-08-21 | 1 | -1/+1 |
| * | [AArch64] Run a peephole pass right after AdvSIMD pass. | Quentin Colombet | 2014-08-21 | 1 | -1/+5 |
| * | [AArch64] Add an FP load balancing pass for Cortex-A57 | James Molloy | 2014-08-08 | 1 | -0/+4 |
