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| author | Hao Liu <Hao.Liu@arm.com> | 2015-06-15 01:56:40 +0000 |
|---|---|---|
| committer | Hao Liu <Hao.Liu@arm.com> | 2015-06-15 01:56:40 +0000 |
| commit | d0ca8d7edd96c8a99736c19d15bbfd15e91df7f1 (patch) | |
| tree | 590e1770b25116e4c89f209c775fba7060ba9fdb /llvm/lib/Target/AArch64/AArch64TargetMachine.cpp | |
| parent | 59e9578f20bb773417344575042677311d9ada6c (diff) | |
| download | bcm5719-llvm-d0ca8d7edd96c8a99736c19d15bbfd15e91df7f1.tar.gz bcm5719-llvm-d0ca8d7edd96c8a99736c19d15bbfd15e91df7f1.zip | |
[AArch64] Revert r239711 again. We need to discuss how to share code between AArch64 and ARM backend.
llvm-svn: 239713
Diffstat (limited to 'llvm/lib/Target/AArch64/AArch64TargetMachine.cpp')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64TargetMachine.cpp | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp index eb78c8c0452..29995903d11 100644 --- a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp +++ b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp @@ -67,11 +67,6 @@ EnableAtomicTidy("aarch64-atomic-cfg-tidy", cl::Hidden, " to make use of cmpxchg flow-based information"), cl::init(true)); -static cl::opt<bool> AArch64InterleavedAccessOpt( - "aarch64-interleaved-access-opt", - cl::desc("Optimize interleaved memory accesses in the AArch64 backend"), - cl::init(false), cl::Hidden); - static cl::opt<bool> EnableEarlyIfConversion("aarch64-enable-early-ifcvt", cl::Hidden, cl::desc("Run early if-conversion"), @@ -228,9 +223,6 @@ void AArch64PassConfig::addIRPasses() { if (TM->getOptLevel() != CodeGenOpt::None && EnableAtomicTidy) addPass(createCFGSimplificationPass()); - if (TM->getOptLevel() != CodeGenOpt::None && AArch64InterleavedAccessOpt) - addPass(createAArch64InterleavedAccessPass()); - TargetPassConfig::addIRPasses(); if (TM->getOptLevel() == CodeGenOpt::Aggressive && EnableGEPOpt) { |
