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path: root/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
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* Simplify some boolean conditional return statements in AArch64.Eric Christopher2016-02-291-3/+1
* CXX_FAST_TLS calling convention: performance improvement for AArch64.Manman Ren2015-12-161-1/+13
* [CXX TLS calling convention] Add support for AArch64.Manman Ren2015-12-081-0/+4
* [AArch64] Remove check for Darwin that was needed to decide if x18 shouldAkira Hatanaka2015-07-271-9/+7
* [AArch64] Define subtarget feature "reserve-x18", which is used to decideAkira Hatanaka2015-07-251-9/+8
* Targets: commonize some stack realignment codeJF Bastien2015-07-201-23/+0
* Target RegisterInfo: devirtualize TargetFrameLoweringJF Bastien2015-07-101-12/+8
* [AArch64] Add support for dynamic stack alignmentKristof Beyls2015-04-091-0/+30
* [ARM] Fix handling of thumb1 out-of-range frame offsetsJohn Brawn2015-03-201-2/+3
* Revert "Migrate the AArch64 TargetRegisterInfo to its TargetMachine"Eric Christopher2015-03-181-2/+2
* Migrate the AArch64 TargetRegisterInfo to its TargetMachineEric Christopher2015-03-121-2/+2
* Remove the need to cache the subtarget in the AArch64 TargetRegisterInfoEric Christopher2015-03-121-15/+21
* Have getCallPreservedMask and getThisCallPreservedMask take aEric Christopher2015-03-111-2/+4
* AArch64: add backend option to reserve x18 (platform register)Tim Northover2015-01-211-3/+7
* [AArch64] Implement GHC calling conventionGreg Fitzgerald2015-01-191-1/+9
* Have MachineFunction cache a pointer to the subtarget to make lookupsEric Christopher2014-08-051-11/+6
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-6/+11
* AArch64: implement copies to/from NZCV as a last ditch effort.Tim Northover2014-05-271-1/+1
* AArch64/ARM64: move ARM64 into AArch64's placeTim Northover2014-05-241-0/+404
* AArch64/ARM64: remove AArch64 from tree prior to renaming ARM64.Tim Northover2014-05-241-186/+0
* [cleanup] Lift using directives, DEBUG_TYPE definitions, and even someChandler Carruth2014-04-221-2/+2
* Make consistent use of MCPhysReg instead of uint16_t throughout the tree.Craig Topper2014-04-041-1/+1
* Re-sort all of the includes with ./utils/sort_includes.py so thatChandler Carruth2014-01-071-1/+1
* [AArch64]Add support to spill/fill D tuples such as DPair/DTriple/DQuad. Ther...Hao Liu2014-01-071-1/+4
* [AArch64]Add code to spill/fill Q register tuples such as QPair/QTriple/QQuad.Hao Liu2013-12-301-8/+19
* Don't cache the instruction info and register info objects.Bill Wendling2013-06-071-3/+4
* Move the eliminateCallFramePseudoInstr method from TargetRegisterInfoEli Bendersky2013-02-211-38/+0
* AArch64: fix build on some MSVC versionsTim Northover2013-02-111-3/+3
* Fix formatting in AArch64 backend.Tim Northover2013-02-051-3/+5
* Update AArch64 backend to changed eliminateFrameIndex interface.Tim Northover2013-01-311-13/+9
* Add AArch64 as an experimental target.Tim Northover2013-01-311-0/+211
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