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path: root/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
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* [AArch64] Fix useful bits detection for BFM instructionsSilviu Baranga2016-11-301-9/+38
* [AArch64] Transfer memory operands when lowering vector load/store intrinsicsSanjin Sijaric2016-11-071-0/+11
* Use StringRef in Pass/PassManager APIs (NFC)Mehdi Amini2016-10-011-1/+1
* [AArch64] Improve add/sub/cmp isel of uxtw forms.Geoff Berry2016-09-261-0/+5
* getValueType().getSizeInBits() -> getValueSizeInBits() ; NFCISanjay Patel2016-09-141-1/+1
* getValueType().getScalarSizeInBits() -> getScalarValueSizeInBits() ; NFCISanjay Patel2016-09-141-1/+1
* getScalarType().getSizeInBits() -> getScalarSizeInBits() ; NFCISanjay Patel2016-09-141-1/+1
* Use the range variant of transform instead of unpacking begin/endDavid Majnemer2016-08-121-4/+4
* AArch64: TableGenerate system instruction operands.Tim Northover2016-07-051-22/+22
* AArch64: use correct SDValue # when looking for bitfield placement.Tim Northover2016-07-051-2/+3
* [AArch64] Remove an overly aggressive assert.Chad Rosier2016-06-221-5/+0
* Apply most suggestions of clang-tidy's performance-unnecessary-value-paramBenjamin Kramer2016-06-081-1/+1
* [AArch64] Spot SBFX-compatible code expressed with sign_extend.Chad Rosier2016-06-031-0/+30
* [AArch64] Spot SBFX-compatbile code expressed with sign_extend_inreg.Chad Rosier2016-06-031-0/+37
* [AArch64] Generate a BFI/BFXIL from 'or (and X, MaskImm), OrImm'.Chad Rosier2016-05-261-1/+95
* [AArch64 ] Generate a BFXIL from 'or (and X, Mask0Imm),(and Y, Mask1Imm)'.Chad Rosier2016-05-191-0/+59
* [AArch64] Push comment into function. NFC.Chad Rosier2016-05-181-9/+9
* [AArch64] Minor refactoring. NFC.Chad Rosier2016-05-181-4/+5
* Use proper capitalization and punctuation per coding standards. NFC.Chad Rosier2016-05-161-1/+1
* [AArch64] Update local variable names to conform to coding standard. NFC.Chad Rosier2016-05-141-31/+31
* [AArch64] Simplify logic to reduce vertical space. NFC.Chad Rosier2016-05-131-6/+2
* SDAG: Implement Select instead of SelectImpl in AArch64DAGToDAGISelJustin Bogner2016-05-121-802/+1161
* SDAG: Clean up dangling nodes in AArch64ISelDAGToDAG::SelectImplJustin Bogner2016-05-121-5/+8
* [AArch64] Give function a more appropriate name.Chad Rosier2016-05-121-3/+3
* [AArch64] Minor refactoring to simplify future patch. NFC.Chad Rosier2016-05-121-29/+16
* [AArch64] Add support for unscaled narrow stores in getUsefulBitsForUse.Chad Rosier2016-05-121-0/+2
* [AArch64] Remove floating-point narrow stores from getUsefulBitsForUse.Chad Rosier2016-05-121-2/+0
* [AArch64] Improve getUsefulBitsForUse for narrow stores.Chad Rosier2016-05-111-0/+14
* SDAG: Rename Select->SelectImpl and repurpose Select as returning voidJustin Bogner2016-05-051-2/+2
* AArch64: expand cmpxchg after regalloc at -O0.Tim Northover2016-04-141-0/+37
* NFC: make AtomicOrdering an enum classJF Bastien2016-04-061-1/+1
* Simplify some boolean conditional return statements in AArch64.Eric Christopher2016-02-291-7/+2
* GlobalValue: use getValueType() instead of getType()->getPointerElementType().Manuel Jacob2016-01-161-1/+1
* [AArch64] Fix a corner case in BitFeild selectWeiming Zhao2015-12-011-5/+11
* [AArch64] Add ARMv8.2-A UAO PSTATE bitOliver Stannard2015-11-261-1/+1
* Make a bunch of static arrays const.Craig Topper2015-10-181-4/+4
* [MC layer][AArch64] llvm-mc accepts 4-bit immediate values forAlexandros Lamprineas2015-10-051-1/+9
* Don't raise inexact when lowering ceil, floor, round, trunc.Stephen Canon2015-09-221-174/+1
* [AArch64] Improved bitfield instruction selection.Geoff Berry2015-09-181-11/+67
* Typos. NFC.Chad Rosier2015-09-171-5/+5
* Fix an undefined behavior introduces in r247234Steven Wu2015-09-101-1/+1
* [ADT] Switch a bunch of places in LLVM that were doing single-characterChandler Carruth2015-09-101-1/+1
* [AArch64] Match FI+offset in STNP addressing mode.Ahmed Bougacha2015-09-101-0/+13
* [AArch64] Match base+offset in STNP addressing mode.Ahmed Bougacha2015-09-101-0/+16
* [AArch64] Support selecting STNP.Ahmed Bougacha2015-09-101-0/+33
* Add missing break in AArch64DAGToDAGISel::Select() switch caseMehdi Amini2015-08-231-0/+1
* wrap OptSize and MinSize attributes for easier and consistent access (NFCI)Sanjay Patel2015-08-041-3/+1
* [AArch64] Add isel support for f16 indexed LD/ST.Ahmed Bougacha2015-08-041-0/+2
* [AArch64] Match float round and convert to int instructions.Geoff Berry2015-07-281-12/+116
* AArch64: add comment missed out from earlier patch.Tim Northover2015-07-171-0/+4
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