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* [SelectionDAG] computeKnownBits - support constant pool values from targetSimon Pilgrim2019-05-243-3/+66
| | | | | | | | | | | | | | | | This patch adds the overridable TargetLowering::getTargetConstantFromLoad function which allows targets to return any constant value loaded by a LoadSDNode node - only X86 makes use of this so far but everything should be in place for other targets. computeKnownBits then uses this function to improve codegen, notably vector code after legalization. A future commit will do the same for ComputeNumSignBits but computeKnownBits sees the bigger benefit. This required a couple of fixes: * SimplifyDemandedBits must early-out for getTargetConstantFromLoad cases to prevent infinite loops of constant regeneration (similar to what we already do for BUILD_VECTOR). * Fix a DAGCombiner::visitTRUNCATE issue as we had trunc(shl(v8i32),v8i16) <-> shl(trunc(v8i16),v8i32) infinite loops after legalization on AVX512 targets. Differential Revision: https://reviews.llvm.org/D61887 llvm-svn: 361620
* Use the DataLayout::typeSizeEqualsStoreSize helper. NFCBjorn Pettersson2019-05-241-3/+2
| | | | | | | | | Just a minor refactoring to use the new helper method DataLayout::typeSizeEqualsStoreSize(). This is done when checking if getTypeSizeInBits is equal/non-equal to getTypeStoreSizeInBits. llvm-svn: 361613
* GlobalISel: support swifterror attribute on AArch64.Tim Northover2019-05-242-17/+86
| | | | | | | | swifterror marks an argument as a register pretending to be a pointer, so we need a guaranteed mem2reg-like analysis of its uses. Fortunately most of the infrastructure can be reused from the DAG world. llvm-svn: 361608
* CodeGen: factor out swifterror value tracking.Tim Northover2019-05-246-341/+346
| | | | llvm-svn: 361607
* [DAGCombiner] make folds of binops safe for opcodes that produce >1 valueSanjay Patel2019-05-231-5/+7
| | | | | | | | | | This is no-functional-change-intended currently because the definition of isBinOp() only includes opcodes that produce 1 value. But if we share that implementation with isCommutativeBinOp() as proposed in D62191, then we need to make sure that the callers bail out for opcodes that they are not prepared to handle correctly. llvm-svn: 361547
* AMDGPU/GlobalISel: Legality for integer min/maxMatt Arsenault2019-05-231-1/+13
| | | | llvm-svn: 361519
* [AsmPrinter] Treat a narrowing PtrToInt like TruncShoaib Meenai2019-05-231-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | When printing assembly for PtrToInt, AsmPrinter::lowerConstant incorrectly assumed that if PtrToInt was not converting to an int with exactly the same number of bits, it must be widening to a larger int. But this isn't necessarily true; PtrToInt can also shrink the size, which is useful when you want to produce a known 32-bit pointer on a 64-bit platform (on x86_64 ELF this yields a R_X86_64_32 relocation). The old behavior of falling through to the widening case for a narrowing PtrToInt yields bogus assembly code like this, which fails to assemble because the no-op bit and it accidentally creates is not a valid relocation: ``` .long a&-1 ``` The fix is to treat a narrowing PtrToInt exactly the same as it already treats Trunc: just emit the expression and let the assembler deal with truncating it in the appropriate way. Patch by Mat Hostetter <mjh@fb.com>. Differential Revision: https://reviews.llvm.org/D61325 llvm-svn: 361508
* [LiveDebugValues] Rename 'DMI' into 'DebugInstr' (NFC)Petar Jovanovic2019-05-231-33/+37
| | | | | | | | | | This will improve code readability. Patch by Djordje Todorovic. Differential Revision: https://reviews.llvm.org/D62295 llvm-svn: 361497
* [MergeICmps] Make the pass compatible with the new pass manager.Clement Courbet2019-05-231-1/+1
| | | | | | | | | | | | Reviewers: gchatelet, spatel Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D62287 llvm-svn: 361490
* [DwarfExpression] Refactor dwarf expression (NFC)Petar Jovanovic2019-05-232-23/+44
| | | | | | | | | | | | Refactor location description kind in order to be easier for extensions (needed for D60866). In addition, cut off some bits from the other class fields. Patch by Djordje Todorovic. Differential Revision: https://reviews.llvm.org/D62002 llvm-svn: 361480
* MC: Allow getMaxInstLength to depend on the subtargetMatt Arsenault2019-05-221-3/+5
| | | | | | | | | | | | Keep it optional in cases this is ever needed in some global context. Currently it's only used for getting an upper bound inline asm code size. For AMDGPU, gfx10 increases the maximum instruction size to 20-bytes. This avoids penalizing older subtargets when estimating code size, and making some annoying branch relaxation test adjustments. llvm-svn: 361405
* [TargetLowering] Extend bool args to inline-asm according to getBooleanTypeKees Cook2019-05-221-1/+10
| | | | | | | | | | | | | | | | | Summary: This extends Krzysztof Parzyszek's X86-specific solution (https://reviews.llvm.org/D60208) to the generic code pointed out by James Y Knight. Reviewers: kparzysz, craig.topper, nickdesaulniers Subscribers: efriedma, sdardis, nemanjai, javed.absar, eraman, fedor.sergeev, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, jsji, llvm-commits, srhines, void, nickdesaulniers, jyknight Tags: #llvm Differential Revision: https://reviews.llvm.org/D60224 llvm-svn: 361404
* [TargetLowering] Add blank line (test commit)Kees Cook2019-05-221-0/+1
| | | | llvm-svn: 361403
* [MIR] Add simple PRE pass to MachineCSEAnton Afanasyev2019-05-221-9/+113
| | | | | | | | | | | | | | | | | | | | | | | | This is the second part of the commit fixing PR38917 (hoisting partitially redundant machine instruction). Most of PRE (partitial redundancy elimination) and CSE work is done on LLVM IR, but some of redundancy arises during DAG legalization. Machine CSE is not enough to deal with it. This simple PRE implementation works a little bit intricately: it passes before CSE, looking for partitial redundancy and transforming it to fully redundancy, anticipating that the next CSE step will eliminate this created redundancy. If CSE doesn't eliminate this, than created instruction will remain dead and eliminated later by Remove Dead Machine Instructions pass. The third part of the commit is supposed to refactor MachineCSE, to make it more clear and to merge MachinePRE with MachineCSE, so one need no rely on further Remove Dead pass to clear instrs not eliminated by CSE. First step: https://reviews.llvm.org/D54839 Fixes llvm.org/PR38917 llvm-svn: 361356
* Fix register coalescer failure to prune valueStanislav Mekhanoshin2019-05-211-2/+4
| | | | | | | | | | | | | | | | | | Register coalescer fails for the test in the patch with the assertion in JoinVals::ConflictResolution `DefMI != nullptr'. It attempts to join live intervals for two adjacent instructions and erase the copy: %2:vreg_256 = COPY %1 %3:vreg_256 = COPY killed %1 The LI needs to be adjusted to kill subrange for the erased instruction and extend the subrange of the original def. That was done for the main interval only but not for the subrange. As a result subrange had a VNI pointing to the erased slot resulting in the above failure. Differential Revision: https://reviews.llvm.org/D62162 llvm-svn: 361293
* [Intrinsic] Signed Fixed Point Saturation Multiplication IntrinsicLeonard Chan2019-05-218-19/+195
| | | | | | | | | | | | | | Add an intrinsic that takes 2 signed integers with the scale of them provided as the third argument and performs fixed point multiplication on them. The result is saturated and clamped between the largest and smallest representable values of the first 2 operands. This is a part of implementing fixed point arithmetic in clang where some of the more complex operations will be implemented as intrinsics. Differential Revision: https://reviews.llvm.org/D55720 llvm-svn: 361289
* [SelectionDAG] fold insert subvector of undef into undefSanjay Patel2019-05-211-0/+3
| | | | | | | | | | | | DAGCombiner simplifies this more liberally as: // If inserting an UNDEF, just return the original vector. if (N1.isUndef()) return N0; So there's no way to make this visible in output AFAIK, but doing this at node creation time should be slightly more efficient. llvm-svn: 361287
* [SelectionDAG] remove redundant code; NFCISanjay Patel2019-05-211-6/+2
| | | | | | | | | getNode() squashes concatenation of undefs via FoldCONCAT_VECTORS(): // Concat of UNDEFs is UNDEF. if (llvm::all_of(Ops, [](SDValue Op) { return Op.isUndef(); })) return DAG.getUNDEF(VT); llvm-svn: 361284
* [DAGCombiner] prevent unsafe reassociation of FP opsSanjay Patel2019-05-211-1/+8
| | | | | | | | | | | There are no FP callers of DAGCombiner::reassociateOps() currently, but we can add a fast-math check to make sure this API is not being misused. This was noted as a potential risk (and that risk might increase) with: D62191 llvm-svn: 361268
* [ScheduleDAGInstrs] Compute topological ordering on demand.Florian Hahn2019-05-211-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In most cases, the topological ordering does not get changed in ScheduleDAGInstrs. We can compute the ordering on demand, similar to D60125. This drastically cuts down the number of times we need to compute the topological ordering, e.g. for SPEC2006, SPEC2k and MultiSource, we get the following stats for -O3 -flto on X86 (showing the top reductions, with small absolute values filtered). The smallest reduction is -50%. Slightly positive impact on compile-time (-0.1 % geomean speedup for test-suite + SPEC & co, with -O1 on X86) Tests: 243 Metric: pre-RA-sched.NumTopoInits Program base patch diff test-suite...ngs-C/fixoutput/fixoutput.test 115.00 3.00 -97.4% test-suite...ks/Prolangs-C/cdecl/cdecl.test 957.00 26.00 -97.3% test-suite...math/automotive-basicmath.test 107.00 3.00 -97.2% test-suite...rolangs-C++/deriv2/deriv2.test 144.00 6.00 -95.8% test-suite...lowfish/security-blowfish.test 410.00 18.00 -95.6% test-suite...frame_layout/frame_layout.test 441.00 23.00 -94.8% test-suite...rolangs-C++/employ/employ.test 159.00 11.00 -93.1% test-suite...s/Ptrdist/anagram/anagram.test 157.00 11.00 -93.0% test-suite...s-C/unix-smail/unix-smail.test 829.00 59.00 -92.9% test-suite...chmarks/Olden/power/power.test 154.00 11.00 -92.9% test-suite...T95/147.vortex/147.vortex.test 19876.00 1434.00 -92.8% test-suite...000/255.vortex/255.vortex.test 19881.00 1435.00 -92.8% test-suite...ce/Applications/Burg/burg.test 2203.00 168.00 -92.4% test-suite...urce/Applications/hbd/hbd.test 1067.00 85.00 -92.0% test-suite...ternal/HMMER/hmmcalibrate.test 3145.00 251.00 -92.0% test-suite.../Applications/spiff/spiff.test 1037.00 84.00 -91.9% test-suite...SPEC/CINT95/130.li/130.li.test 5913.00 487.00 -91.8% test-suite.../CINT95/134.perl/134.perl.test 12532.00 1041.00 -91.7% test-suite...ce/Benchmarks/Olden/bh/bh.test 220.00 19.00 -91.4% test-suite :: External/Nurbs/nurbs.test 2304.00 206.00 -91.1% test-suite...arks/VersaBench/dbms/dbms.test 773.00 75.00 -90.3% test-suite...ce/Applications/siod/siod.test 9043.00 878.00 -90.3% test-suite...pplications/treecc/treecc.test 4510.00 438.00 -90.3% test-suite...T2006/456.hmmer/456.hmmer.test 7093.00 697.00 -90.2% test-suite...s-C/Pathfinder/PathFinder.test 882.00 87.00 -90.1% test-suite.../CINT2000/176.gcc/176.gcc.test 64978.00 6721.00 -89.7% test-suite...cations/hexxagon/hexxagon.test 657.00 69.00 -89.5% test-suite...fice-ispell/office-ispell.test 2712.00 285.00 -89.5% test-suite.../CINT2006/403.gcc/403.gcc.test 139613.00 14992.00 -89.3% test-suite...lications/ClamAV/clamscan.test 25880.00 2785.00 -89.2% Reviewers: MatzeB, atrick, efriedma, niravd Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D60839 llvm-svn: 361253
* Add TargetLoweringInfo hook for explicitly setting the ABI calling ↵Dylan McKay2019-05-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | convention endianess Summary: The endianess used in the calling convention does not always match the endianess of the target on all architectures, namely AVR. When an argument is too large to be legalised by the architecture and is split for the ABI, a new hook TargetLoweringInfo::shouldSplitFunctionArgumentsAsLittleEndian is queried to find the endianess that function arguments must be laid out in. This approach was recommended by Eli Friedman. Originally reported in https://github.com/avr-rust/rust/issues/129. Patch by Carl Peto. Reviewers: bogner, t.p.northover, RKSimon, niravd, efriedma Reviewed By: efriedma Subscribers: JDevlieghere, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D62003 llvm-svn: 361222
* [SelectionDAGBuilder] Flush PendingExports before creating INLINEASM_BR node ↵Craig Topper2019-05-201-3/+11
| | | | | | | | | | | | | | | for asm goto. Since INLINEASM_BR is a terminator we need to flush the pending exports before emitting it. If we don't do this, a TokenFactor can be inserted between it and the BR instruction emitted to finish the callbr lowering. It looks like nodes are glued to the INLINEASM_BR so I had to make sure we emit the TokenFactor before that. Differential Revision: https://reviews.llvm.org/D59981 llvm-svn: 361177
* [Intrinsics] Merge lround.i32 and lround.i64 into a single intrinsic with ↵Craig Topper2019-05-201-6/+4
| | | | | | | | | | overloaded result type. Make result type for llvm.llround overloaded instead of fixing to i64 We shouldn't really make assumptions about possible sizes for long and long long. And longer term we should probably support vectorizing these intrinsics. By making the result types not fixed we can support vectors as well. Differential Revision: https://reviews.llvm.org/D62026 llvm-svn: 361169
* [DAGCombiner] Refactor code in visitShiftByConstant slightly to make it more ↵Craig Topper2019-05-201-11/+12
| | | | | | | | | | | | readable. NFC This changes the isShift variable to include the constant operand check that was previously in the if statement. While there fix an 80 column violation and an unnecessary use of getNode. Also fix variable name capitalization. llvm-svn: 361168
* [SDAG] Vector op legalization for overflow opsNikita Popov2019-05-203-66/+120
| | | | | | | | | | | | | | | | | | Fixes issue reported by aemerson on D57348. Vector op legalization support is added for uaddo, usubo, saddo and ssubo (umulo and smulo were already supported). As usual, by extracting TargetLowering methods and calling them from vector op legalization. Vector op legalization doesn't really deal with multiple result nodes, so I'm explicitly performing a recursive legalization call on the result value that is not being legalized. There are some existing test changes because expansion happens earlier, so we don't get a DAG combiner run in between anymore. Differential Revision: https://reviews.llvm.org/D61692 llvm-svn: 361166
* RegAlloc: Fix verifier error with undef identity copiesMatt Arsenault2019-05-201-1/+1
| | | | | | | | The code did not match the example in the comment, and was checking the undef flag on the copy dest instead of source. The existing tests were only hitting the > 2 operands case. llvm-svn: 361156
* [NFC] Refactor visitIntrinsicCall so it doesn't return a const char*Guillaume Chatelet2019-05-202-141/+148
| | | | | | | | | | | | | | Summary: API simplification Reviewers: courbet Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D61306 llvm-svn: 361140
* [DebugInfoMetadata] Refactor DIExpression::prepend constants (NFC)Petar Jovanovic2019-05-207-17/+19
| | | | | | | | | | | Refactor DIExpression::With* into a flag enum in order to be less error-prone to use (as discussed on D60866). Patch by Djordje Todorovic. Differential Revision: https://reviews.llvm.org/D61943 llvm-svn: 361137
* Revert "[NFC] Refactor visitIntrinsicCall so it doesn't return a const char*"Guillaume Chatelet2019-05-202-145/+138
| | | | | | This reverts commit 706d3cd6388cc3446aab282f3af879862b10cbed. llvm-svn: 361130
* [NFC] Refactor visitIntrinsicCall so it doesn't return a const char*Guillaume Chatelet2019-05-202-138/+145
| | | | | | | | | | | | | | Summary: API simplification Reviewers: courbet Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D61306 llvm-svn: 361129
* MemCmpExpansion::getCompareLoadPairs - assert we find a comparison diff. NFCI.Simon Pilgrim2019-05-181-1/+3
| | | | | | Fix scan-build uninitialized warning and assert the final diff isn't null. llvm-svn: 361095
* GlobalISel: Implement lower for S64->S32 [SU]ITOFPMatt Arsenault2019-05-171-0/+121
| | | | | | | | | | | | | This is ported from the custom AMDGPU DAG implementation. I think this is a better default expansion than what the DAG currently uses, at least if the target has CTLZ. This implements the signed version in terms of the unsigned conversion, which is implemented with bit operations. SelectionDAG has several other implementations that should eventually be ported depending on what instructions are legal. llvm-svn: 361081
* GlobalISel: Define integer min/max instructionsMatt Arsenault2019-05-171-1/+5
| | | | | | | Doesn't attempt to emit them for anything yet, but some legalizations I want to port use them. llvm-svn: 361061
* [DAGCombiner] visitShiftByConstant(): drop bogus signbit checkRoman Lebedev2019-05-171-18/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: That check claims that the transform is illegal otherwise. That isn't true: 1. For `ISD::ADD`, we only process `ISD::SHL` outer shift => sign bit does not matter https://rise4fun.com/Alive/K4A 2. For `ISD::AND`, there is no restriction on constants: https://rise4fun.com/Alive/Wy3 3. For `ISD::OR`, there is no restriction on constants: https://rise4fun.com/Alive/GOH 3. For `ISD::XOR`, there is no restriction on constants: https://rise4fun.com/Alive/ml6 So, why is it there then? This changes the testcase that was touched by @spatel in rL347478, but i'm not sure that test tests anything particular? Reviewers: RKSimon, spatel, craig.topper, jojo, rengolin Reviewed By: spatel Subscribers: javed.absar, llvm-commits, spatel Tags: #llvm Differential Revision: https://reviews.llvm.org/D61918 llvm-svn: 361044
* AMDGPU/GlobalISel: Legalize G_FCOPYSIGNMatt Arsenault2019-05-171-0/+1
| | | | llvm-svn: 361025
* [GlobalISel] Fix -Wsign-compare on 32-bit -DLLVM_ENABLE_ASSERTIONS=on buildsFangrui Song2019-05-171-1/+2
| | | | llvm-svn: 360989
* [ELF] Implement Dependent Libraries FeatureBen Dunbobbin2019-05-171-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements a limited form of autolinking primarily designed to allow either the --dependent-library compiler option, or "comment lib" pragmas ( https://docs.microsoft.com/en-us/cpp/preprocessor/comment-c-cpp?view=vs-2017) in C/C++ e.g. #pragma comment(lib, "foo"), to cause an ELF linker to automatically add the specified library to the link when processing the input file generated by the compiler. Currently this extension is unique to LLVM and LLD. However, care has been taken to design this feature so that it could be supported by other ELF linkers. The design goals were to provide: - A simple linking model for developers to reason about. - The ability to to override autolinking from the linker command line. - Source code compatibility, where possible, with "comment lib" pragmas in other environments (MSVC in particular). Dependent library support is implemented differently for ELF platforms than on the other platforms. Primarily this difference is that on ELF we pass the dependent library specifiers directly to the linker without manipulating them. This is in contrast to other platforms where they are mapped to a specific linker option by the compiler. This difference is a result of the greater variety of ELF linkers and the fact that ELF linkers tend to handle libraries in a more complicated fashion than on other platforms. This forces us to defer handling the specifiers to the linker. In order to achieve a level of source code compatibility with other platforms we have restricted this feature to work with libraries that meet the following "reasonable" requirements: 1. There are no competing defined symbols in a given set of libraries, or if they exist, the program owner doesn't care which is linked to their program. 2. There may be circular dependencies between libraries. The binary representation is a mergeable string section (SHF_MERGE, SHF_STRINGS), called .deplibs, with custom type SHT_LLVM_DEPENDENT_LIBRARIES (0x6fff4c04). The compiler forms this section by concatenating the arguments of the "comment lib" pragmas and --dependent-library options in the order they are encountered. Partial (-r, -Ur) links are handled by concatenating .deplibs sections with the normal mergeable string section rules. As an example, #pragma comment(lib, "foo") would result in: .section ".deplibs","MS",@llvm_dependent_libraries,1 .asciz "foo" For LTO, equivalent information to the contents of a the .deplibs section can be retrieved by the LLD for bitcode input files. LLD processes the dependent library specifiers in the following way: 1. Dependent libraries which are found from the specifiers in .deplibs sections of relocatable object files are added when the linker decides to include that file (which could itself be in a library) in the link. Dependent libraries behave as if they were appended to the command line after all other options. As a consequence the set of dependent libraries are searched last to resolve symbols. 2. It is an error if a file cannot be found for a given specifier. 3. Any command line options in effect at the end of the command line parsing apply to the dependent libraries, e.g. --whole-archive. 4. The linker tries to add a library or relocatable object file from each of the strings in a .deplibs section by; first, handling the string as if it was specified on the command line; second, by looking for the string in each of the library search paths in turn; third, by looking for a lib<string>.a or lib<string>.so (depending on the current mode of the linker) in each of the library search paths. 5. A new command line option --no-dependent-libraries tells LLD to ignore the dependent libraries. Rationale for the above points: 1. Adding the dependent libraries last makes the process simple to understand from a developers perspective. All linkers are able to implement this scheme. 2. Error-ing for libraries that are not found seems like better behavior than failing the link during symbol resolution. 3. It seems useful for the user to be able to apply command line options which will affect all of the dependent libraries. There is a potential problem of surprise for developers, who might not realize that these options would apply to these "invisible" input files; however, despite the potential for surprise, this is easy for developers to reason about and gives developers the control that they may require. 4. This algorithm takes into account all of the different ways that ELF linkers find input files. The different search methods are tried by the linker in most obvious to least obvious order. 5. I considered adding finer grained control over which dependent libraries were ignored (e.g. MSVC has /nodefaultlib:<library>); however, I concluded that this is not necessary: if finer control is required developers can fall back to using the command line directly. RFC thread: http://lists.llvm.org/pipermail/llvm-dev/2019-March/131004.html. Differential Revision: https://reviews.llvm.org/D60274 llvm-svn: 360984
* Emit global variables as S_CONSTANT records for codeview debug info.Amy Huang2019-05-162-34/+72
| | | | | | | | | | | | | | | | | | | | Summary: This emits S_CONSTANT records for global variables. Currently this emits records for the global variables already being tracked in the LLVM IR metadata, which are just constant global variables; we'll also want S_CONSTANTs for static data members and enums. Related to https://bugs.llvm.org/show_bug.cgi?id=41615 Reviewers: rnk Subscribers: aprantl, hiraditya, llvm-commits, thakis Tags: #llvm Differential Revision: https://reviews.llvm.org/D61926 llvm-svn: 360948
* [CodeGen] Fixed de-optimization of legalize subvector extractTim Renouf2019-05-161-0/+18
| | | | | | | | | | | | | | | The recent introduction of v3i32 etc as an MVT, and its use in AMDGPU 3-dword memory instructions, caused a de-optimization problem for code with such a load that then bitcasts via vector of i8, because v12i8 is not an MVT so it legalizes the bitcast by widening it. This commit adds the ability to widen a bitcast using extract_subvector on the result, so the value does not need to go via memory. Differential Revision: https://reviews.llvm.org/D60457 Change-Id: Ie4abb7760547e54a2445961992eafc78e80d4b64 llvm-svn: 360942
* [CodeGen] Add lround/llround builtinsAdhemerval Zanella2019-05-167-0/+146
| | | | | | | | | | | | | This patch add the ISD::LROUND and ISD::LLROUND along with new intrinsics. The changes are straightforward as for other floating-point rounding functions, with just some adjustments required to handle the return value being an interger. The idea is to optimize lround/llround generation for AArch64 in a subsequent patch. Current semantic is just route it to libm symbol. llvm-svn: 360889
* RegAllocFast: Improve hinting heuristicMatt Arsenault2019-05-161-7/+84
| | | | | | | | | | | | | | | Trace through multiple COPYs when looking for a physreg source. Add hinting for vregs that will be copied into physregs (we only hinted for vregs getting copied to a physreg previously). Give hinted a register a bonus when deciding which value to spill. This is part of my rewrite regallocfast series. In fact this one doesn't even have an effect unless you also flip the allocation to happen from back to front of a basic block. Nonetheless it helps to split this up to ease review of D52010 Patch by Matthias Braun llvm-svn: 360887
* GlobalISel: Add DstOp version of buildIntrinsicMatt Arsenault2019-05-161-0/+12
| | | | llvm-svn: 360879
* GlobalISel: Add buildFConstant for APFloatMatt Arsenault2019-05-161-0/+7
| | | | llvm-svn: 360853
* GlobalISel: Fix indentationMatt Arsenault2019-05-161-1/+1
| | | | llvm-svn: 360851
* GlobalISel: Add G_FCOPYSIGNMatt Arsenault2019-05-161-0/+2
| | | | llvm-svn: 360850
* [codeview] Fix SDNode representation of annotation labelsReid Kleckner2019-05-153-1/+4
| | | | | | | | | | | Before this change, they were erroneously constructed with the EH_LABEL SDNode opcode, which caused other passes to interact with them in incorrect ways. See the FIXME about fastisel that this addresses in the existing test case. Fixes PR41890 llvm-svn: 360818
* [MachineOperand] Add a ChangeToGA methodNicolai Haehnle2019-05-151-0/+13
| | | | | | | | | | | | | | | | | | Summary: Analogous to the other ChangeToXXX methods. See the next patch for a use case. Change-Id: I6548d614706834fb9109ab3c8fe915e9c6ece2a7 Reviewers: arsenm, kzhuravl Subscribers: wdng, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D61651 llvm-svn: 360789
* RegAlloc: try to fail more gracefully when out of registersNicolai Haehnle2019-05-151-6/+10
| | | | | | | | | | | | | | | | | | | | | | | Summary: The emitError path allows the program to continue, unlike report_fatal_error. This is friendlier to use cases where LLVM is embedded in a larger program, because the caller may be able to deal with the error somewhat gracefully. Change the number of requested NOP bytes in the AArch64 and PowerPC test cases to avoid triggering an unrelated assertion. The compilation still fails, as verified by the test. Change-Id: Iafb9ca341002a597b82e59ddc7a1f13c78758e3d Reviewers: arsenm, MatzeB Subscribers: qcolombet, nemanjai, wdng, javed.absar, kristof.beyls, kbarton, jsji, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D61489 llvm-svn: 360786
* [[DAGCombiner][NFC] Add a comment.Clement Courbet2019-05-151-0/+2
| | | | | | As suggested in D61846. llvm-svn: 360755
* [IR] Disallow llvm.global_ctors and llvm.global_dtors of the 2-field form in ↵Fangrui Song2019-05-151-8/+6
| | | | | | | | | | | | | | | | | | | | textual format The 3-field form was introduced by D3499 in 2014 and the legacy 2-field form was planned to be removed in LLVM 4.0 For the textual format, this patch migrates the existing 2-field form to use the 3-field form and deletes the compatibility code. test/Verifier/global-ctors-2.ll checks we have a friendly error message. For bitcode, lib/IR/AutoUpgrade UpgradeGlobalVariables will upgrade the 2-field form (add i8* null as the third field). Reviewed By: rnk, dexonsmith Differential Revision: https://reviews.llvm.org/D61547 llvm-svn: 360742
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