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* Add support in SplitVectorOp for remainder operators.Dan Gohman2007-11-191-1/+4
| | | | llvm-svn: 44233
* Add support for vectors to int <-> float casts.Nate Begeman2007-11-171-1/+5
| | | | llvm-svn: 44204
* Live interval splitting:Evan Cheng2007-11-176-139/+588
| | | | | | | | | | | | | | | | | | | When a live interval is being spilled, rather than creating short, non-spillable intervals for every def / use, split the interval at BB boundaries. That is, for every BB where the live interval is defined or used, create a new interval that covers all the defs and uses in the BB. This is designed to eliminate one common problem: multiple reloads of the same value in a single basic block. Note, it does *not* decrease the number of spills since no copies are inserted so the split intervals are *connected* through spill and reloads (or rematerialization). The newly created intervals can be spilled again, in that case, since it does not span multiple basic blocks, it's spilled in the usual manner. However, it can reuse the same stack slot as the previously split interval. This is currently controlled by -split-intervals-at-bb. llvm-svn: 44198
* Implement necessary bits for flt_rounds gcc builtin. Anton Korobeynikov2007-11-154-0/+24
| | | | | | Codegen bits and llvm-gcc support will follow. llvm-svn: 44182
* Basic non-power-of-2 vector supportNate Begeman2007-11-151-29/+37
| | | | llvm-svn: 44181
* This assertion was bogus.Duncan Sands2007-11-151-3/+2
| | | | llvm-svn: 44167
* Fix a thinko in post-allocation coalescer.Evan Cheng2007-11-151-3/+10
| | | | llvm-svn: 44166
* Adding debug output during coalescing.Bill Wendling2007-11-151-0/+1
| | | | llvm-svn: 44154
* Need to increment the iterator.Bill Wendling2007-11-151-1/+1
| | | | llvm-svn: 44153
* Fix PIC jump table codegen on x86-32/linux. In fact, such thing should be ↵Anton Korobeynikov2007-11-141-28/+41
| | | | | | | | applied to all targets uses GOT-relative offsets for PIC (Alpha?) llvm-svn: 44108
* Clean up sub-register implementation by moving subReg information back toEvan Cheng2007-11-144-38/+24
| | | | | | | | | | | MachineOperand auxInfo. Previous clunky implementation uses an external map to track sub-register uses. That works because register allocator uses a new virtual register for each spilled use. With interval splitting (coming soon), we may have multiple uses of the same register some of which are of using different sub-registers from others. It's too fragile to constantly update the information. llvm-svn: 44104
* Run computeDomForest() on the set of registers that need to be tested forOwen Anderson2007-11-131-5/+6
| | | | | | interference. llvm-svn: 44064
* Preserve LiveVariables when doing critical edge splitting.Owen Anderson2007-11-131-2/+13
| | | | llvm-svn: 44063
* Add parameter to getDwarfRegNum to permit targetsDale Johannesen2007-11-131-11/+11
| | | | | | | | to use different mappings for EH and debug info; no functional change yet. Fix warning in X86CodeEmitter. llvm-svn: 44056
* Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stackBill Wendling2007-11-131-2/+23
| | | | | | | | | | | adjustment fields, and an optional flag. If there is a "dynamic_stackalloc" in the code, make sure that it's bracketed by CALLSEQ_START and CALLSEQ_END. If not, then there is the potential for the stack to be changed while the stack's being used by another instruction (like a call). This can only result in tears... llvm-svn: 44037
* Break critical edges coming into blocks with PHI nodes.Owen Anderson2007-11-121-0/+26
| | | | llvm-svn: 44019
* Refactor some code.Evan Cheng2007-11-123-297/+331
| | | | llvm-svn: 44010
* As Chris and Evan pointed out, BreakCriticalMachineEdges doesn't really needOwen Anderson2007-11-123-132/+1
| | | | | | to be a pass of its own. Instead, move it out into a helper method. llvm-svn: 44002
* Fixed a strange construct. Please review.Hartmut Kaiser2007-11-091-1/+1
| | | | llvm-svn: 43960
* Move MinAlign to MathExtras.h.Duncan Sands2007-11-093-3/+1
| | | | llvm-svn: 43944
* Fix some load/store logic that would be wrong forDuncan Sands2007-11-092-6/+10
| | | | | | | | apints on big-endian machines if the bitwidth is not a multiple of 8. Introduce a new helper, MVT::getStoreSizeInBits, and use it. llvm-svn: 43934
* Add terminating newline.Duncan Sands2007-11-091-1/+1
| | | | llvm-svn: 43933
* Much improved pic jumptable codegen:Evan Cheng2007-11-093-20/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Then: call "L1$pb" "L1$pb": popl %eax ... LBB1_1: # entry imull $4, %ecx, %ecx leal LJTI1_0-"L1$pb"(%eax), %edx addl LJTI1_0-"L1$pb"(%ecx,%eax), %edx jmpl *%edx .align 2 .set L1_0_set_3,LBB1_3-LJTI1_0 .set L1_0_set_2,LBB1_2-LJTI1_0 .set L1_0_set_5,LBB1_5-LJTI1_0 .set L1_0_set_4,LBB1_4-LJTI1_0 LJTI1_0: .long L1_0_set_3 .long L1_0_set_2 Now: call "L1$pb" "L1$pb": popl %eax ... LBB1_1: # entry addl LJTI1_0-"L1$pb"(%eax,%ecx,4), %eax jmpl *%eax .align 2 .set L1_0_set_3,LBB1_3-"L1$pb" .set L1_0_set_2,LBB1_2-"L1$pb" .set L1_0_set_5,LBB1_5-"L1$pb" .set L1_0_set_4,LBB1_4-"L1$pb" LJTI1_0: .long L1_0_set_3 .long L1_0_set_2 llvm-svn: 43924
* Didn't mean to check these in.Evan Cheng2007-11-092-14/+11
| | | | llvm-svn: 43923
* Bug fix. Passive nodes are not in SUnitMap.Evan Cheng2007-11-093-14/+20
| | | | llvm-svn: 43922
* This preserves critical edge breaking.Owen Anderson2007-11-081-0/+1
| | | | llvm-svn: 43911
* Make BreakCriticalMachineEdges available as a pass that can be depended on.Owen Anderson2007-11-081-1/+1
| | | | llvm-svn: 43910
* If both parts of smul_lohi, etc. are used, don't simplify. If only one part ↵Evan Cheng2007-11-081-30/+31
| | | | | | is used, try simplify it. llvm-svn: 43888
* Add the majority of machine-level critical edge breaking pass. Most of this ↵Owen Anderson2007-11-081-0/+131
| | | | | | | | was written by Fernando, cleanup and updating to TOT by me. This still needs a bit of work, particularly to handle jump tables properly. llvm-svn: 43885
* Take another stab at getting isLiveIn() and isLiveOut() right.Owen Anderson2007-11-081-8/+11
| | | | llvm-svn: 43869
* Bring UsedBlocks back. StrongPHIElimination needs this information.Owen Anderson2007-11-083-1/+15
| | | | llvm-svn: 43866
* Simplify my (il)logic.Evan Cheng2007-11-071-11/+2
| | | | llvm-svn: 43819
* Add some more of StrongPHIElim.Owen Anderson2007-11-071-12/+74
| | | | llvm-svn: 43805
* Remainder operations must be either integer or floating-point.Dan Gohman2007-11-061-1/+3
| | | | llvm-svn: 43781
* When the allocator rewrite a spill register with new virtual register, it ↵Evan Cheng2007-11-061-3/+12
| | | | | | | | replaces other operands of the same register. Watch out for situations where only some of the operands are sub-register uses. llvm-svn: 43776
* First step towards moving the coalescer to priority_queue based machinery.Evan Cheng2007-11-062-50/+251
| | | | llvm-svn: 43764
* Fix a bug where a def use operand isn't being detected as a sub-register use.Evan Cheng2007-11-061-4/+7
| | | | llvm-svn: 43763
* Add pseudo dependency to force two-address instruction to be scheduled afterEvan Cheng2007-11-061-2/+5
| | | | | | | other uses. There was a overly restricted check that prevented some obvious cases. llvm-svn: 43762
* Add a few comments.Owen Anderson2007-11-061-0/+5
| | | | llvm-svn: 43755
* DomForest is a forest of registers, not instructions.Owen Anderson2007-11-061-25/+47
| | | | llvm-svn: 43754
* StrongPHIElimination requires LiveVariables.Owen Anderson2007-11-061-10/+24
| | | | llvm-svn: 43751
* Add support for vector remainder operations.Dan Gohman2007-11-051-7/+13
| | | | llvm-svn: 43744
* Move the LowerMEMCPY and LowerMEMCPYCall to a common place.Rafael Espindola2007-11-051-0/+55
| | | | | | Thanks for the suggestions Bill :-) llvm-svn: 43742
* Make labels work in asm blocks; allow labels asDale Johannesen2007-11-054-34/+53
| | | | | | | parameters. Rename ValueRefList to ParamList in AsmParser, since its only use is for parameters. llvm-svn: 43734
* Don't output ABI size padding twice. By using the storeDuncan Sands2007-11-051-5/+6
| | | | | | | size for the field we get ABI padding automatically, so no need to put it in again when we emit the field. llvm-svn: 43720
* Move SimpleRegisterCoalescing.h to lib/CodeGen since there is now a commonEvan Cheng2007-11-052-2/+186
| | | | | | register coalescer interface: RegisterCoalescing. llvm-svn: 43714
* Skip over deleted val#'s.Evan Cheng2007-11-051-2/+2
| | | | llvm-svn: 43700
* Handle cases where a register and one of its super-register are both marked asEvan Cheng2007-11-051-2/+4
| | | | | | defined on the same instruction. This fixes PR1767. llvm-svn: 43699
* Fix PR1187.Evan Cheng2007-11-051-1/+1
| | | | llvm-svn: 43692
* Eliminate the remaining uses of getTypeSize. ThisDuncan Sands2007-11-055-27/+28
| | | | | | | | | | | | | | should only effect x86 when using long double. Now 12/16 bytes are output for long double globals (the exact amount depends on the alignment). This brings globals in line with the rest of LLVM: the space reserved for an object is now always the ABI size. One tricky point is that only 10 bytes should be output for long double if it is a field in a packed struct, which is the reason for the additional argument to EmitGlobalConstant. llvm-svn: 43688
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