Add pseudo dependency to force two-address instruction to be scheduled after

other uses. There was a overly restricted check that prevented some obvious
cases.

llvm-svn: 43762

1 files changed, 5 insertions, 2 deletions

diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
index 5a2f2003036..9c03b4e5b0f 100644
--- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
@@ -1308,8 +1308,11 @@ void BURegReductionPriorityQueue<SF>::AddPseudoTwoAddrDeps() {
           // plus it may increase register pressures.
           if (SuccSU == SU || SuccSU->hasPhysRegDefs)
             continue;
-          // Be conservative. Ignore if nodes aren't at the same depth.
-          if (SuccSU->Depth != SU->Depth)
+          // Be conservative. Ignore if nodes aren't at roughly the same
+          // depth and height.
+          if (SuccSU->Height < SU->Height && (SU->Height - SuccSU->Height) > 1)
+            continue;
+          if (SuccSU->Depth > SU->Depth && (SuccSU->Depth - SU->Depth) > 1)
             continue;
           if (!SuccSU->Node || !SuccSU->Node->isTargetOpcode())
             continue;