| Commit message (Collapse) | Author | Age | Files | Lines |
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isn't legal.
llvm-svn: 81492
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post-decrement load/store.
llvm-svn: 81464
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llvm-svn: 81454
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llvm-svn: 81436
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from the exception tables. However, Duncan explained why it's a can of worms to
do it the GCC way. I went back to doing it the LLVM way and added Duncan's
explanation so that I don't do this again in the future.
llvm-svn: 81434
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like what GCC outputs. The mysterious code to insert padding wasn't in GCC at
all. I modified the TType base offset code to calculate the offset like GCC
does, though.
llvm-svn: 81424
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code within it was the same inside and out. There's still a problem of the
TypeInfoSize should be the size of the TType format encoding (at least that's
what GCC thinks it should be).
llvm-svn: 81417
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llvm-svn: 81415
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llvm-svn: 81409
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sizeof(DW_EH_PE_udata4).
llvm-svn: 81408
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llvm-svn: 81406
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Basically, this patch is working towards removing the hard-coded values that are
output for the CIE. In particular, the CIE augmentation and the CIE augmentation
size. Both of these should be calculated. In the process, I was able to make a
bunch of code simpler.
The encodings for the personality, LSDA, and FDE in the CIE are still not
correct. They should be generated either from target-specific callbacks (blech!)
or grokked from first-principles.
llvm-svn: 81404
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the MCInst path of the asmprinter. Instead, pull comment printing
out of the autogenerated asmprinter into each target that uses the
autogenerated asmprinter. This causes code duplication into each
target, but in a way that will be easier to clean up later when more
asmprinter stuff is commonized into the base AsmPrinter class.
This also fixes an xcore strangeness where it inserted two tabs
before every instruction.
llvm-svn: 81396
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llvm-svn: 81382
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llvm-svn: 81381
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llvm-svn: 81380
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require a LiveIntervals instance in future.
llvm-svn: 81374
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llvm-svn: 81360
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llvm-svn: 81343
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to instructions instead of zero extended ones. This makes the asmprinter
print signed values more consistently. This apparently only really affects
the X86 backend.
llvm-svn: 81265
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instruction to insert before can be end(). getDebugLoc on
end() returns an invalid value, therefore use the debug
loc of the call instruction, and give it to InsertLabel.
llvm-svn: 81207
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Make sure the sub-register class matches the register class of the remat'ed instruction definition register class.
llvm-svn: 81204
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null in the case of an empty struct, so don't try to call getNumValues
on it.
llvm-svn: 81180
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from floating-point to integer first, and bitcast the result
back to floating-point. Previously, this test was passing by
falling back to SelectionDAG lowering. The resulting code isn't
as nice, but it's correct and CodeGen now stays on the fast path.
llvm-svn: 81171
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llvm-svn: 81124
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Patch by Erick Tryzelaar.
llvm-svn: 81116
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about by icc (#593, partial). Patch by Erick Tryzelaar.
llvm-svn: 81115
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llvm-svn: 81112
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icc (#177, partial). Patch by Erick Tryzelaar.
llvm-svn: 81106
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Do not use DenseMap operator[] because it inserts new entry if lookup fails. Use find() to check an entry in a DenseMap first.
llvm-svn: 81058
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llvm-svn: 81055
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a new class, MachineInstrIndex, which hides arithmetic details from
most clients. This is a step towards allowing the register allocator
to update/insert code during allocation.
llvm-svn: 81040
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llvm-svn: 80997
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llvm-svn: 80994
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llvm-svn: 80993
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llvm-svn: 80976
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llvm-svn: 80971
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FastISel to recognize this pattern and emit a floating-point
negation using xor.
llvm-svn: 80963
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llvm-svn: 80962
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wasn't doing the right thing.
llvm-svn: 80958
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for the complicated case where one register is tied to multiple destinations.
This avoids the extra scan of instruction operands that was introduced by
my recent change. I also pulled some code out into a separate
TryInstructionTransform method, added more comments, and renamed some
variables.
Besides all those changes, this takes care of a FIXME in the code regarding
an assumption about there being a single tied use of a register when
converting to a 3-address form. I'm not aware of cases where that assumption
is violated, but the code now only attempts to transform an instruction,
either by commuting its operands or by converting to a 3-address form,
for the simple case where there is a single pair of tied operands.
llvm-svn: 80945
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swapping the operands if necessary.
llvm-svn: 80940
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avoid reloads by reusing clobbered registers.
This was causing issues in 256.bzip2 when compiled with PIC for
a while (starting at r78217), though the problem has since been masked.
llvm-svn: 80872
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llvm-svn: 80798
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llvm-svn: 80773
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to find the kill, since we already have the operand.
llvm-svn: 80736
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llvm-svn: 80733
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llvm-svn: 80731
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least partly unsupported, in X86 encoding at least).
llvm-svn: 80726
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llvm-svn: 80717
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