diff options
| author | Chris Lattner <sabre@nondot.org> | 2009-09-08 23:05:44 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2009-09-08 23:05:44 +0000 |
| commit | e819cfbc71f042d71cae445dacaea162878f33c8 (patch) | |
| tree | a6cd60ffbfec6133aa573f3ff8d20374229976ec /llvm/lib/CodeGen | |
| parent | 22f339010c2ef36ecf794b02a5bb5252272d4af0 (diff) | |
| download | bcm5719-llvm-e819cfbc71f042d71cae445dacaea162878f33c8.tar.gz bcm5719-llvm-e819cfbc71f042d71cae445dacaea162878f33c8.zip | |
change selectiondag to add the sign extended versions of immediate operands
to instructions instead of zero extended ones. This makes the asmprinter
print signed values more consistently. This apparently only really affects
the X86 backend.
llvm-svn: 81265
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp index ec82b351d89..5454e98ae03 100644 --- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp @@ -282,7 +282,7 @@ void ScheduleDAGSDNodes::AddOperand(MachineInstr *MI, SDValue Op, if (Op.isMachineOpcode()) { AddRegisterOperand(MI, Op, IIOpNum, II, VRBaseMap); } else if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) { - MI->addOperand(MachineOperand::CreateImm(C->getZExtValue())); + MI->addOperand(MachineOperand::CreateImm(C->getSExtValue())); } else if (ConstantFPSDNode *F = dyn_cast<ConstantFPSDNode>(Op)) { const ConstantFP *CFP = F->getConstantFPValue(); MI->addOperand(MachineOperand::CreateFPImm(CFP)); |
