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* Fix the missing symbols problem Bill was hitting. Patch contributed byChris Lattner2005-03-171-0/+1
| | | | | | Bill Wendling!! llvm-svn: 20649
* This mega patch converts us from using Function::a{iterator|begin|end} toChris Lattner2005-03-152-13/+13
| | | | | | | | using Function::arg_{iterator|begin|end}. Likewise Module::g* -> Module::global_*. This patch is contributed by Gabor Greif, thanks! llvm-svn: 20597
* I didn't mean to check this in. :(Chris Lattner2005-03-101-3/+1
| | | | llvm-svn: 20555
* Fix a bug where we would incorrectly do a sign ext instead of a zero extChris Lattner2005-03-101-1/+1
| | | | | | | because we were checking the wrong thing. Thanks to andrew for pointing this out! llvm-svn: 20554
* Allow the live interval analysis pass to be a bit more aggressive aboutChris Lattner2005-03-092-10/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | numbering values in live ranges for physical registers. The alpha backend currently generates code that looks like this: vreg = preg ... preg = vreg use preg ... preg = vreg use preg etc. Because vreg contains the value of preg coming in, each of the copies back into preg contain that initial value as well. In the case of the Alpha, this allows this testcase: void "foo"(int %blah) { store int 5, int *%MyVar store int 12, int* %MyVar2 ret void } to compile to: foo: ldgp $29, 0($27) ldiq $0,5 stl $0,MyVar ldiq $0,12 stl $0,MyVar2 ret $31,($26),1 instead of: foo: ldgp $29, 0($27) bis $29,$29,$0 ldiq $1,5 bis $0,$0,$29 stl $1,MyVar ldiq $1,12 bis $0,$0,$29 stl $1,MyVar2 ret $31,($26),1 This does not seem to have any noticable effect on X86 code. This fixes PR535. llvm-svn: 20536
* constant fold FP_ROUND_INREG, ZERO_EXTEND_INREG, and SIGN_EXTEND_INREGChris Lattner2005-03-091-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows the alpha backend to compile: bool %test(uint %P) { %c = seteq uint %P, 0 ret bool %c } into: test: ldgp $29, 0($27) ZAP $16,240,$0 CMPEQ $0,0,$0 AND $0,1,$0 ret $31,($26),1 instead of: test: ldgp $29, 0($27) ZAP $16,240,$0 ldiq $1,0 ZAP $1,240,$1 CMPEQ $0,$1,$0 AND $0,1,$0 ret $31,($26),1 ... and fixes PR534. llvm-svn: 20534
* Lower llvm.isunordered(a, b) into a != a | b != b.Alkis Evlogimenos2005-03-011-3/+8
| | | | llvm-svn: 20382
* Lower prefetch to a noop, patch contributed by Justin Wick!Chris Lattner2005-02-281-0/+3
| | | | llvm-svn: 20375
* Fix a bug in the 'store fpimm, ptr' -> 'store intimm, ptr' handling code.Chris Lattner2005-02-221-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Changing 'op' here caused us to not enter the store into a map, causing reemission of the code!! In practice, a simple loop like this: no_exit: ; preds = %no_exit, %entry %indvar = phi uint [ %indvar.next, %no_exit ], [ 0, %entry ] ; <uint> [#uses=3] %tmp.4 = getelementptr "complex long double"* %P, uint %indvar, uint 0 ; <double*> [#uses=1] store double 0.000000e+00, double* %tmp.4 %indvar.next = add uint %indvar, 1 ; <uint> [#uses=2] %exitcond = seteq uint %indvar.next, %N ; <bool> [#uses=1] br bool %exitcond, label %return, label %no_exit was being code gen'd to: .LBBtest_1: # no_exit movl %edx, %esi shll $4, %esi movl $0, 4(%eax,%esi) movl $0, (%eax,%esi) incl %edx movl $0, (%eax,%esi) movl $0, 4(%eax,%esi) cmpl %ecx, %edx jne .LBBtest_1 # no_exit Note that we are doing 4 32-bit stores instead of 2. Now we generate: .LBBtest_1: # no_exit movl %edx, %esi incl %esi shll $4, %edx movl $0, (%eax,%edx) movl $0, 4(%eax,%edx) cmpl %ecx, %esi movl %esi, %edx jne .LBBtest_1 # no_exit This is much happier, though it would be even better if the increment of ESI was scheduled after the compare :-/ llvm-svn: 20265
* Fix compilation errors with VS 2005, patch by Aaron Gray.Misha Brukman2005-02-171-0/+3
| | | | llvm-svn: 20231
* Don't rely on doubles comparing identical to each other, which doesn't workChris Lattner2005-02-171-4/+19
| | | | | | for 0.0 and -0.0. llvm-svn: 20230
* Don't sink argument loads into loops or other bad places. This disables ↵Chris Lattner2005-02-171-1/+8
| | | | | | folding of argument loads with instructions that are not in the entry block. llvm-svn: 20228
* Print GEP offsets as signed values instead of unsigned values. On X86, thisChris Lattner2005-02-141-3/+7
| | | | | | | | | | | | | | prints: getelementptr (int* %A, int -1) as: "(A) - 4" instead of "(A) + 18446744073709551612", which makes the assembler much happier. This fixes test/Regression/CodeGen/X86/2005-02-14-IllegalAssembler.ll, and Benchmarks/Prolangs-C/cdecl with LLC on X86. llvm-svn: 20183
* Fix a case where were incorrectly compiled cast from short to int on 64-bitChris Lattner2005-02-041-2/+4
| | | | | | targets. llvm-svn: 20030
* fix constant pointer outputing on 64 bit machinesAndrew Lenharth2005-02-041-0/+5
| | | | llvm-svn: 20026
* Fix yet another memset issue.Chris Lattner2005-02-021-4/+13
| | | | llvm-svn: 19986
* Fix some bugs andrew noticed legalizing memset for alphaChris Lattner2005-02-011-3/+3
| | | | llvm-svn: 19969
* Improve conformance with the Misha spelling benchmark suiteChris Lattner2005-01-302-2/+2
| | | | llvm-svn: 19930
* adjust to ilist changes.Chris Lattner2005-01-292-5/+4
| | | | llvm-svn: 19924
* Alpha doesn't have a native f32 extload instruction.Chris Lattner2005-01-281-1/+5
| | | | llvm-svn: 19880
* implement legalization of truncates whose results and sources need to beChris Lattner2005-01-281-2/+5
| | | | | | truncated, e.g. (truncate:i8 something:i16) on a 32 or 64-bit RISC. llvm-svn: 19879
* Get alpha working with memset/memcpy/memmoveChris Lattner2005-01-281-5/+29
| | | | llvm-svn: 19878
* CopyFromReg produces two values. Make sure that we remember that both areChris Lattner2005-01-281-1/+8
| | | | | | legalized, and actually return the correct result when we legalize the chain first. llvm-svn: 19866
* Silence optimized warnings.Chris Lattner2005-01-231-1/+1
| | | | llvm-svn: 19797
* Simplify/speedup the PEI by not having to scan for uses of the callee savedChris Lattner2005-01-231-19/+5
| | | | | | | registers. This information is computed directly by the register allocator now. llvm-svn: 19795
* Update physregsused info.Chris Lattner2005-01-231-10/+18
| | | | llvm-svn: 19793
* Update this pass to set PhysRegsUsed info in MachineFunction.Chris Lattner2005-01-231-1/+13
| | | | llvm-svn: 19792
* Update these register allocators to set the PhysRegUsed info in MachineFunction.Chris Lattner2005-01-233-11/+35
| | | | llvm-svn: 19791
* Add support for the PhysRegsUsed array.Chris Lattner2005-01-231-2/+3
| | | | llvm-svn: 19789
* Speed this up a bit by making ModifiedRegs a vector<char> not vector<bool>Chris Lattner2005-01-231-6/+5
| | | | llvm-svn: 19787
* Adjust to changes in SelectionDAG interfacesChris Lattner2005-01-231-9/+119
| | | | | | | The first half of correct chain insertion for libcalls. This is not enough to fix Fhourstones yet though. llvm-svn: 19781
* Remove the 3 HACK HACK HACKs I put in before, fixing them properly withChris Lattner2005-01-231-14/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the new TLI that is available. Implement support for handling out of range shifts. This allows us to compile this code (a 64-bit rotate): unsigned long long f3(unsigned long long x) { return (x << 32) | (x >> (64-32)); } into this: f3: mov %EDX, DWORD PTR [%ESP + 4] mov %EAX, DWORD PTR [%ESP + 8] ret GCC produces this: $ gcc t.c -masm=intel -O3 -S -o - -fomit-frame-pointer .. f3: push %ebx mov %ebx, DWORD PTR [%esp+12] mov %ecx, DWORD PTR [%esp+8] mov %eax, %ebx mov %edx, %ecx pop %ebx ret The Simple ISEL produces (eww gross): f3: sub %ESP, 4 mov DWORD PTR [%ESP], %ESI mov %EDX, DWORD PTR [%ESP + 8] mov %ECX, DWORD PTR [%ESP + 12] mov %EAX, 0 mov %ESI, 0 or %EAX, %ECX or %EDX, %ESI mov %ESI, DWORD PTR [%ESP] add %ESP, 4 ret llvm-svn: 19780
* Adjust to changes in SelectionDAG interface.Chris Lattner2005-01-231-2/+2
| | | | llvm-svn: 19779
* Get this to work for 64-bit systems.Chris Lattner2005-01-221-6/+11
| | | | llvm-svn: 19763
* Implicitly defined registers can clobber callee saved registers too!Chris Lattner2005-01-221-0/+6
| | | | | | This fixes the return-address-not-being-saved problem in the Alpha backend. llvm-svn: 19741
* More bugfixes for IA64 shifts.Chris Lattner2005-01-221-2/+2
| | | | llvm-svn: 19739
* Fix problems with non-x86 targets.Chris Lattner2005-01-221-3/+3
| | | | llvm-svn: 19738
* Add a nasty hack to fix Alpha/IA64 multiplies by a power of two.Chris Lattner2005-01-221-4/+9
| | | | llvm-svn: 19737
* Remove unneeded line.Chris Lattner2005-01-211-1/+0
| | | | llvm-svn: 19736
* test commitChris Lattner2005-01-211-0/+1
| | | | llvm-svn: 19735
* Unary token factor nodes are unneeded.Chris Lattner2005-01-211-0/+2
| | | | llvm-svn: 19727
* Refactor libcall code a bit. Initial implementation of expanding int -> FPChris Lattner2005-01-211-50/+121
| | | | | | operations for 64-bit integers. llvm-svn: 19724
* Simplify the shift-expansion code.Chris Lattner2005-01-201-8/+7
| | | | llvm-svn: 19721
* Expand add/sub into ADD_PARTS/SUB_PARTS instead of a non-existant libcall.Chris Lattner2005-01-201-2/+41
| | | | llvm-svn: 19715
* implement add_parts/sub_parts.Chris Lattner2005-01-201-3/+8
| | | | llvm-svn: 19714
* Add missing entry.Chris Lattner2005-01-201-0/+1
| | | | llvm-svn: 19712
* Support targets that do not use i8 shift amounts.Chris Lattner2005-01-191-0/+4
| | | | llvm-svn: 19707
* Add an assertion that would have made more sense to duraidChris Lattner2005-01-191-1/+3
| | | | llvm-svn: 19704
* Add support for targets that pass args in registers to calls.Chris Lattner2005-01-191-6/+25
| | | | llvm-svn: 19703
* Fold single use token factor nodes into other token factor nodes.Chris Lattner2005-01-191-2/+10
| | | | llvm-svn: 19701
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