diff options
| author | Chris Lattner <sabre@nondot.org> | 2005-01-23 22:55:45 +0000 | 
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2005-01-23 22:55:45 +0000 | 
| commit | 3d527f7b6112dbdd7f8ab7bb9855a60f5b4925ac (patch) | |
| tree | a810145c2a02a1b9b9b439226ff4f8b310d4704e /llvm/lib/CodeGen | |
| parent | 24f0f0e28fb6f930522afe2bd310179969a209ac (diff) | |
| download | bcm5719-llvm-3d527f7b6112dbdd7f8ab7bb9855a60f5b4925ac.tar.gz bcm5719-llvm-3d527f7b6112dbdd7f8ab7bb9855a60f5b4925ac.zip  | |
Update physregsused info.
llvm-svn: 19793
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/RegAllocSimple.cpp | 28 | 
1 files changed, 18 insertions, 10 deletions
diff --git a/llvm/lib/CodeGen/RegAllocSimple.cpp b/llvm/lib/CodeGen/RegAllocSimple.cpp index ba05bd38309..00f3180a137 100644 --- a/llvm/lib/CodeGen/RegAllocSimple.cpp +++ b/llvm/lib/CodeGen/RegAllocSimple.cpp @@ -35,6 +35,7 @@ namespace {      MachineFunction *MF;      const TargetMachine *TM;      const MRegisterInfo *RegInfo; +    bool *PhysRegsEverUsed;      // StackSlotForVirtReg - Maps SSA Regs => frame index on the stack where      // these values are spilled @@ -118,8 +119,10 @@ unsigned RegAllocSimple::getFreeReg(unsigned virtualReg) {      assert(RI+regIdx != RE && "Not enough registers!");      unsigned PhysReg = *(RI+regIdx); -    if (!RegsUsed[PhysReg]) +    if (!RegsUsed[PhysReg]) { +      PhysRegsEverUsed[PhysReg] = true;        return PhysReg; +    }    }  } @@ -156,19 +159,20 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {      RegsUsed.resize(RegInfo->getNumRegs()); -    // a preliminary pass that will invalidate any registers that -    // are used by the instruction (including implicit uses) +    // This is a preliminary pass that will invalidate any registers that are +    // used by the instruction (including implicit uses).      unsigned Opcode = MI->getOpcode();      const TargetInstrDescriptor &Desc = TM->getInstrInfo()->get(Opcode); -    const unsigned *Regs = Desc.ImplicitUses; -    while (*Regs) -      RegsUsed[*Regs++] = true; +    const unsigned *Regs; +    for (Regs = Desc.ImplicitUses; *Regs; ++Regs) +      RegsUsed[*Regs] = true; -    Regs = Desc.ImplicitDefs; -    while (*Regs) -      RegsUsed[*Regs++] = true; +    for (Regs = Desc.ImplicitDefs; *Regs; ++Regs) { +      RegsUsed[*Regs] = true; +      PhysRegsEverUsed[*Regs] = true; +    } -    // Loop over uses, move from memory into registers +    // Loop over uses, move from memory into registers.      for (int i = MI->getNumOperands() - 1; i >= 0; --i) {        MachineOperand &op = MI->getOperand(i); @@ -225,6 +229,10 @@ bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {    TM = &MF->getTarget();    RegInfo = TM->getRegisterInfo(); +  PhysRegsEverUsed = new bool[RegInfo->getNumRegs()]; +  std::fill(PhysRegsEverUsed, PhysRegsEverUsed+RegInfo->getNumRegs(), false); +  Fn.setUsedPhysRegs(PhysRegsEverUsed); +    // Loop over all of the basic blocks, eliminating virtual register references    for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();         MBB != MBBe; ++MBB)  | 

