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* Improve conformance with the Misha spelling benchmark suiteChris Lattner2005-01-302-2/+2
| | | | llvm-svn: 19930
* adjust to ilist changes.Chris Lattner2005-01-292-5/+4
| | | | llvm-svn: 19924
* Alpha doesn't have a native f32 extload instruction.Chris Lattner2005-01-281-1/+5
| | | | llvm-svn: 19880
* implement legalization of truncates whose results and sources need to beChris Lattner2005-01-281-2/+5
| | | | | | truncated, e.g. (truncate:i8 something:i16) on a 32 or 64-bit RISC. llvm-svn: 19879
* Get alpha working with memset/memcpy/memmoveChris Lattner2005-01-281-5/+29
| | | | llvm-svn: 19878
* CopyFromReg produces two values. Make sure that we remember that both areChris Lattner2005-01-281-1/+8
| | | | | | legalized, and actually return the correct result when we legalize the chain first. llvm-svn: 19866
* Silence optimized warnings.Chris Lattner2005-01-231-1/+1
| | | | llvm-svn: 19797
* Simplify/speedup the PEI by not having to scan for uses of the callee savedChris Lattner2005-01-231-19/+5
| | | | | | | registers. This information is computed directly by the register allocator now. llvm-svn: 19795
* Update physregsused info.Chris Lattner2005-01-231-10/+18
| | | | llvm-svn: 19793
* Update this pass to set PhysRegsUsed info in MachineFunction.Chris Lattner2005-01-231-1/+13
| | | | llvm-svn: 19792
* Update these register allocators to set the PhysRegUsed info in MachineFunction.Chris Lattner2005-01-233-11/+35
| | | | llvm-svn: 19791
* Add support for the PhysRegsUsed array.Chris Lattner2005-01-231-2/+3
| | | | llvm-svn: 19789
* Speed this up a bit by making ModifiedRegs a vector<char> not vector<bool>Chris Lattner2005-01-231-6/+5
| | | | llvm-svn: 19787
* Adjust to changes in SelectionDAG interfacesChris Lattner2005-01-231-9/+119
| | | | | | | The first half of correct chain insertion for libcalls. This is not enough to fix Fhourstones yet though. llvm-svn: 19781
* Remove the 3 HACK HACK HACKs I put in before, fixing them properly withChris Lattner2005-01-231-14/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the new TLI that is available. Implement support for handling out of range shifts. This allows us to compile this code (a 64-bit rotate): unsigned long long f3(unsigned long long x) { return (x << 32) | (x >> (64-32)); } into this: f3: mov %EDX, DWORD PTR [%ESP + 4] mov %EAX, DWORD PTR [%ESP + 8] ret GCC produces this: $ gcc t.c -masm=intel -O3 -S -o - -fomit-frame-pointer .. f3: push %ebx mov %ebx, DWORD PTR [%esp+12] mov %ecx, DWORD PTR [%esp+8] mov %eax, %ebx mov %edx, %ecx pop %ebx ret The Simple ISEL produces (eww gross): f3: sub %ESP, 4 mov DWORD PTR [%ESP], %ESI mov %EDX, DWORD PTR [%ESP + 8] mov %ECX, DWORD PTR [%ESP + 12] mov %EAX, 0 mov %ESI, 0 or %EAX, %ECX or %EDX, %ESI mov %ESI, DWORD PTR [%ESP] add %ESP, 4 ret llvm-svn: 19780
* Adjust to changes in SelectionDAG interface.Chris Lattner2005-01-231-2/+2
| | | | llvm-svn: 19779
* Get this to work for 64-bit systems.Chris Lattner2005-01-221-6/+11
| | | | llvm-svn: 19763
* Implicitly defined registers can clobber callee saved registers too!Chris Lattner2005-01-221-0/+6
| | | | | | This fixes the return-address-not-being-saved problem in the Alpha backend. llvm-svn: 19741
* More bugfixes for IA64 shifts.Chris Lattner2005-01-221-2/+2
| | | | llvm-svn: 19739
* Fix problems with non-x86 targets.Chris Lattner2005-01-221-3/+3
| | | | llvm-svn: 19738
* Add a nasty hack to fix Alpha/IA64 multiplies by a power of two.Chris Lattner2005-01-221-4/+9
| | | | llvm-svn: 19737
* Remove unneeded line.Chris Lattner2005-01-211-1/+0
| | | | llvm-svn: 19736
* test commitChris Lattner2005-01-211-0/+1
| | | | llvm-svn: 19735
* Unary token factor nodes are unneeded.Chris Lattner2005-01-211-0/+2
| | | | llvm-svn: 19727
* Refactor libcall code a bit. Initial implementation of expanding int -> FPChris Lattner2005-01-211-50/+121
| | | | | | operations for 64-bit integers. llvm-svn: 19724
* Simplify the shift-expansion code.Chris Lattner2005-01-201-8/+7
| | | | llvm-svn: 19721
* Expand add/sub into ADD_PARTS/SUB_PARTS instead of a non-existant libcall.Chris Lattner2005-01-201-2/+41
| | | | llvm-svn: 19715
* implement add_parts/sub_parts.Chris Lattner2005-01-201-3/+8
| | | | llvm-svn: 19714
* Add missing entry.Chris Lattner2005-01-201-0/+1
| | | | llvm-svn: 19712
* Support targets that do not use i8 shift amounts.Chris Lattner2005-01-191-0/+4
| | | | llvm-svn: 19707
* Add an assertion that would have made more sense to duraidChris Lattner2005-01-191-1/+3
| | | | llvm-svn: 19704
* Add support for targets that pass args in registers to calls.Chris Lattner2005-01-191-6/+25
| | | | llvm-svn: 19703
* Fold single use token factor nodes into other token factor nodes.Chris Lattner2005-01-191-2/+10
| | | | llvm-svn: 19701
* Realize the individual pieces of an expanded copytoreg/store/load areChris Lattner2005-01-191-9/+16
| | | | | | independent of each other. llvm-svn: 19700
* Know some identities about tokenfactor nodes.Chris Lattner2005-01-191-0/+11
| | | | llvm-svn: 19699
* Know some simple identities. This improves codegen for (1LL << N).Chris Lattner2005-01-191-0/+13
| | | | llvm-svn: 19698
* Just in case, handle something that is both a use and a def.Chris Lattner2005-01-191-1/+2
| | | | llvm-svn: 19696
* When an instruction moves, make sure to update the VarInfo::Kills list asChris Lattner2005-01-191-3/+10
| | | | | | | well as all of teh other stuff in livevar. This fixes the compiler crash on fourinarow last night. llvm-svn: 19695
* Use the TargetInstrInfo::commuteInstruction method to commute instructionsChris Lattner2005-01-191-6/+17
| | | | | | instead of doing it manually. llvm-svn: 19685
* Implement a way of expanding shifts. This applies to targets that offerChris Lattner2005-01-191-3/+94
| | | | | | | | select operations or to shifts that are by a constant. This automatically implements (with no special code) all of the special cases for shift by 32, shift by < 32 and shift by > 32. llvm-svn: 19679
* Zero is cheaper than sign extend.Chris Lattner2005-01-181-1/+1
| | | | llvm-svn: 19675
* Fix some fixmes (promoting bools for select and brcond), fix promotionChris Lattner2005-01-181-8/+43
| | | | | | of zero and sign extends. llvm-svn: 19671
* Keep track of the retval type as well.Chris Lattner2005-01-181-2/+5
| | | | llvm-svn: 19670
* Teach legalize to promote copy(from|to)reg, instead of making the isel passChris Lattner2005-01-182-26/+13
| | | | | | | | | do it. This results in better code on X86 for floats (because if strict precision is not required, we can elide some more expensive double -> float conversions like the old isel did), and allows other targets to emit CopyFromRegs that are not legal for arguments. llvm-svn: 19668
* Teach legalize to promote SetCC results.Chris Lattner2005-01-181-0/+8
| | | | llvm-svn: 19657
* Allow setcc operations to have nonbool types.Chris Lattner2005-01-183-42/+46
| | | | llvm-svn: 19656
* Fix the completely broken FP constant folds for setcc's.Chris Lattner2005-01-181-4/+4
| | | | llvm-svn: 19651
* Non-volatile loads can be freely reordered against each other. This fixesChris Lattner2005-01-171-4/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | X86/reg-pressure.ll again, and allows us to do nice things in other cases. For example, we now codegen this sort of thing: int %loadload(int *%X, int* %Y) { %Z = load int* %Y %Y = load int* %X ;; load between %Z and store %Q = add int %Z, 1 store int %Q, int* %Y ret int %Y } Into this: loadload: mov %EAX, DWORD PTR [%ESP + 4] mov %EAX, DWORD PTR [%EAX] mov %ECX, DWORD PTR [%ESP + 8] inc DWORD PTR [%ECX] ret where we weren't able to form the 'inc [mem]' before. This also lets the instruction selector emit loads in any order it wants to, which can be good for register pressure as well. llvm-svn: 19644
* Don't call SelectionDAG.getRoot() directly, go through a forwarding method.Chris Lattner2005-01-171-21/+30
| | | | llvm-svn: 19642
* Implement a target independent optimization to codegen arguments only intoChris Lattner2005-01-171-12/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the basic block that uses them if possible. This is a big win on X86, as it lets us fold the argument loads into instructions and reduce register pressure (by not loading all of the arguments in the entry block). For this (contrived to show the optimization) testcase: int %argtest(int %A, int %B) { %X = sub int 12345, %A br label %L L: %Y = add int %X, %B ret int %Y } we used to produce: argtest: mov %ECX, DWORD PTR [%ESP + 4] mov %EAX, 12345 sub %EAX, %ECX mov %EDX, DWORD PTR [%ESP + 8] .LBBargtest_1: # L add %EAX, %EDX ret now we produce: argtest: mov %EAX, 12345 sub %EAX, DWORD PTR [%ESP + 4] .LBBargtest_1: # L add %EAX, DWORD PTR [%ESP + 8] ret This also fixes the FIXME in the code. BTW, this occurs in real code. 164.gzip shrinks from 8623 to 8608 lines of .s file. The stack frame in huft_build shrinks from 1644->1628 bytes, inflate_codes shrinks from 116->108 bytes, and inflate_block from 2620->2612, due to fewer spills. Take that alkis. :-) llvm-svn: 19639
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