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bcm5719-llvm
meklort-10.0.0
meklort-10.0.1
ortega-7.0.1
Project Ortega BCM5719 LLVM
Raptor Computing Systems
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CodeGen
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Author
Age
Files
Lines
*
Rename doFunction() in BFI to calculate() and change its parameters from poin...
Cong Hou
2015-07-15
1
-1
/
+1
*
Revert "Refactor optimizeUncoalescable logic"
Bruno Cardoso Lopes
2015-07-15
1
-246
/
+127
*
Revert "Look through PHIs to find additional register sources"
Bruno Cardoso Lopes
2015-07-15
1
-265
/
+82
*
Test commit.
Cong Hou
2015-07-15
1
-1
/
+0
*
Debug Info: Add basic support for external types references.
Adrian Prantl
2015-07-15
4
-3
/
+28
*
Look through PHIs to find additional register sources
Bruno Cardoso Lopes
2015-07-15
1
-82
/
+265
*
Refactor optimizeUncoalescable logic
Bruno Cardoso Lopes
2015-07-15
1
-127
/
+246
*
[SDAG] Optimize unordered comparison in soft-float mode (patch by Anton Nadol...
Alexey Bataev
2015-07-15
1
-23
/
+31
*
[MachineCombiner] Work with itineraries
Hal Finkel
2015-07-15
1
-4
/
+9
*
Use enum instead of unsigned. NFC.
Pete Cooper
2015-07-15
2
-2
/
+4
*
Use cast<> instead of dyn_cast to remove llvm_unreachable. NFC.
Pete Cooper
2015-07-15
1
-4
/
+2
*
Use another foreach loop. NFC
Pete Cooper
2015-07-15
1
-2
/
+1
*
Use getAnyExtOrTrunc helper instead of manually doing ext/trunc check. NFC.
Pete Cooper
2015-07-15
1
-14
/
+5
*
Use getZExtOrTrunc helper instead of manually doing zext/trunc check. NFC.
Pete Cooper
2015-07-15
2
-4
/
+2
*
Use getStoreSize() instead of getStoreSizeInBits()/8. NFC.
Pete Cooper
2015-07-15
1
-2
/
+1
*
Use more foreach loops in SelectionDAG. NFC
Pete Cooper
2015-07-14
3
-40
/
+37
*
Add allnodes() iterator range to SelectionDAG. NFC.
Pete Cooper
2015-07-14
2
-9
/
+6
*
Constify parameters in SelectionDAG methods. NFC
Pete Cooper
2015-07-14
1
-3
/
+3
*
Remove unnecessary .getNode() in SelectionDAG. NFC.
Pete Cooper
2015-07-14
1
-22
/
+20
*
Use more foreach loops in SelectionDAG. NFC
Pete Cooper
2015-07-14
1
-7
/
+6
*
MIR Serialization: Serialize the machine basic block live in registers.
Alex Lorenz
2015-07-14
4
-1
/
+44
*
MIR Printer: move the function 'printReg'. NFC.
Alex Lorenz
2015-07-14
1
-13
/
+13
*
[CodeGen] Force emission of personality directive if explicitly specified
Keno Fischer
2015-07-14
5
-22
/
+57
*
MachineRegisterInfo: Remove UsedPhysReg infrastructure
Matthias Braun
2015-07-14
6
-100
/
+8
*
RAGreedy: Keep track of allocated PhysRegs internally
Matthias Braun
2015-07-14
2
-18
/
+32
*
PrologEpilogInserter: Rewrite API to determine callee save regsiters.
Matthias Braun
2015-07-14
3
-27
/
+92
*
Revert "LegalizeDAG: Fix and improve FCOPYSIGN/FABS legalization"
Matthias Braun
2015-07-14
1
-150
/
+74
*
LegalizeDAG: Fix and improve FCOPYSIGN/FABS legalization
Matthias Braun
2015-07-14
1
-74
/
+150
*
MIR Serialization: Serialize the variable sized stack objects.
Alex Lorenz
2015-07-14
2
-4
/
+11
*
MIR Serialization: Serialize the sub register indices.
Alex Lorenz
2015-07-13
4
-3
/
+53
*
[WinEH] Emit the LSDA even if no lpads remain but outlining occurred
Reid Kleckner
2015-07-13
1
-6
/
+14
*
Service the doxygen comments in DwarfUnit and DwarfDebug.
Adrian Prantl
2015-07-13
2
-148
/
+151
*
MIR Serialization: Serialize the fixed stack objects.
Alex Lorenz
2015-07-13
2
-1
/
+36
*
Remove macro guards for extern template instantiations.
Benjamin Kramer
2015-07-13
1
-2
/
+2
*
Fix handling of the 'n' asm constraint with invalid operands.
James Y Knight
2015-07-13
1
-2
/
+2
*
Print the visibility of available_externally functions.
Rafael Espindola
2015-07-13
1
-1
/
+1
*
MIR Serialization: Serialize the virtual register operands.
Alex Lorenz
2015-07-10
6
-13
/
+47
*
[SEH] Push reloads of the SEH code past phi nodes
Reid Kleckner
2015-07-10
1
-6
/
+28
*
DAGCombiner: Assume invariant load cannot alias a store
Matt Arsenault
2015-07-10
1
-0
/
+9
*
[ShrinkWrap][PEI] Do not insert epilogue for unreachable blocks.
Quentin Colombet
2015-07-10
1
-3
/
+8
*
ComputeKnownBits: be a bit smarter about ADDs
Fiona Glaser
2015-07-10
1
-5
/
+14
*
MIR Serialization: Initial serialization of stack objects.
Alex Lorenz
2015-07-10
2
-3
/
+39
*
Revert the new EH instructions
David Majnemer
2015-07-10
3
-36
/
+0
*
New EH representation for MSVC compatibility
David Majnemer
2015-07-10
3
-0
/
+36
*
[WinEH] Make sure LSDA tables are 4 byte aligned
Reid Kleckner
2015-07-10
1
-0
/
+2
*
MIR Serialization: Serialize the virtual register definitions.
Alex Lorenz
2015-07-09
2
-6
/
+62
*
Expose sjlj preparation through opt for my own debugging purposes
Reid Kleckner
2015-07-09
1
-0
/
+2
*
MIR Parser: Report an error when parsing machine function with an empty body.
Alex Lorenz
2015-07-09
1
-0
/
+3
*
[ImplicitNullChecks] Fix a memory leak.
Sanjoy Das
2015-07-09
1
-1
/
+1
*
[ImplicitNullChecks] Be smarter in picking the memory op.
Sanjoy Das
2015-07-09
1
-8
/
+75
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