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* sink the 'name' and 'isdirective' state out of MCSection into its derived ↵Chris Lattner2009-08-082-12/+15
| | | | | | | | classes. This totally optimizes PIC16 sections by not having an 'isdirective' bit anymore!! ;-) llvm-svn: 78517
* 1. Make MCSection an abstract class.Chris Lattner2009-08-081-12/+1
| | | | | | | | | 2. Move section switch printing to MCSection virtual method which takes a TAI. This eliminates textual formatting stuff from TLOF. 3. Eliminate SwitchToSectionDirective, getSectionFlagsAsString, and TLOFELF::AtIsCommentChar. llvm-svn: 78510
* eliminate TargetLoweringObjectFileSparc in favor of a TAI hook.Chris Lattner2009-08-081-1/+1
| | | | | | | | A TAI hook is appropriate in this case because this is just an asm syntax issue, not a semantic difference. TLOF should model the semantics of the section. llvm-svn: 78498
* Don't build illegal ops in DAGCombiner::SimplifyBinOpWithSameOpcodeHands().Jakob Stoklund Olesen2009-08-081-1/+3
| | | | | | | | Blackfin supports and/or/xor on i32 but not on i16. Teach DAGCombiner::SimplifyBinOpWithSameOpcodeHands to not produce illegal nodes after legalize ops. llvm-svn: 78497
* ELF improvements:Bruno Cardoso Lopes2009-08-083-58/+94
| | | | | | | | | | | Handle large integers, x86_fp80, ConstantAggregateZero, and two more ConstantExpr: GetElementPtr and IntToPtr Set SHF_MERGE bit for mergeable strings Avoid zero initialized strings to be classified as a bss symbol Don't allow common symbols to be classified as STB_WEAK Add a constant to be used as a global value offset in data relocations llvm-svn: 78476
* Clean out per-function data after the machine code verifier is done with it.Jakob Stoklund Olesen2009-08-081-0/+8
| | | | | | | | | | | | | | | Also don't dereference old pointers after they have been deleted causing random crashes when enabling the machine code verifier. Ahem... I have not included a test case for the crash. It hapened when enabling the verifier on CodeGen/X86/2009-08-06-branchfolder-crash.ll. The crash depends on an MBB being allocated at the same address as a previously deleted MBB. I don't think that can be reproduced reliably. llvm-svn: 78472
* Update the machine code verifier to keep up with the scavenger.Jakob Stoklund Olesen2009-08-081-12/+22
| | | | | | | | | * Cleaner handling of <undef>. * <def> takes precedence over <def,dead>. * Implement the OK-to-redefine-a-register-that-was- live-in-but-has-not-been-used-before rule. llvm-svn: 78467
* Remove RegisterScavenger::isSuperRegUsed(). This completely reverses the ↵Jakob Stoklund Olesen2009-08-082-38/+9
| | | | | | | | | | | | | | | mistaken commit r77904. Now there is no special treatment of instructions that redefine part of a super-register. Instead, the super-register is marked with <imp-use,kill> and <imp-def>. For instance, from LowerSubregs on ARM: subreg: CONVERTING: %Q1<def> = INSERT_SUBREG %Q1<undef>, %D1<kill>, 5 subreg: %D2<def> = FCPYD %D1<kill>, 14, %reg0, %Q1<imp-def> subreg: CONVERTING: %Q1<def> = INSERT_SUBREG %Q1, %D0<kill>, 6 subreg: %D3<def> = FCPYD %D0<kill>, 14, %reg0, %Q1<imp-use,kill>, %Q1<imp-def> llvm-svn: 78466
* Simplify RegScavenger::forward a bit more.Jakob Stoklund Olesen2009-08-081-65/+53
| | | | | | | | | | | Verify that early clobber registers and their aliases are not used. All changes to RegsAvailable are now done as a transaction so the order of operands makes no difference. The included test case is from PR4686. It has behaviour that was dependent on the order of operands. llvm-svn: 78465
* Fix some -Asserts unused variable warnings.Daniel Dunbar2009-08-082-6/+5
| | | | llvm-svn: 78447
* code cleanupChris Lattner2009-08-071-20/+18
| | | | llvm-svn: 78432
* remove a bunch of now-dead crud from the asmprinter and TAI interfaces.Chris Lattner2009-08-071-32/+0
| | | | llvm-svn: 78428
* Back out some of recent register scavenger change by John Mosby. It broke a ↵Evan Cheng2009-08-071-27/+14
| | | | | | number of ARM tests. llvm-svn: 78421
* tidy upChris Lattner2009-08-071-7/+4
| | | | llvm-svn: 78416
* Rewrite previous patch to follow Chris' stylisticDale Johannesen2009-08-071-14/+22
| | | | | | preference; no functional change. llvm-svn: 78391
* Another coalescer bug. When a dead copy is eliminated, transfer the kill to ↵Evan Cheng2009-08-071-5/+6
| | | | | | a def of the exact register rather than a super-register. llvm-svn: 78376
* Update CMake.Daniel Dunbar2009-08-071-1/+0
| | | | llvm-svn: 78367
* Fix a bunch of namespace pollution.Dan Gohman2009-08-071-2/+16
| | | | llvm-svn: 78363
* Fix a typo in a comment.Dan Gohman2009-08-071-1/+1
| | | | llvm-svn: 78362
* Code clean up.Evan Cheng2009-08-071-4/+5
| | | | llvm-svn: 78360
* Added legal stuff, fixed some formatting issues. Removed the graph generator ↵Lang Hames2009-08-0710-254/+142
| | | | | | stuff as it was only meant for debugging the solver. llvm-svn: 78359
* New C++ PBQP solver. Currently about as fast (read _slow_) as the old C ↵Lang Hames2009-08-0613-1785/+2850
| | | | | | based solver, but I'll be working to improve that. The PBQP allocator has been updated to use the new solver. llvm-svn: 78354
* Fix PR 4626, a crash in branch folding after OptimizeBlockDale Johannesen2009-08-061-1/+17
| | | | | | produced a CFG it wasn't prepared for. llvm-svn: 78351
* Use stripPointerCasts instead of partially rewriting it.Dale Johannesen2009-08-061-4/+2
| | | | llvm-svn: 78350
* Get rid of RegScavenger::backwards() before the bitrot spreads.Jakob Stoklund Olesen2009-08-061-64/+0
| | | | | | If we need it one day, there is nothing wrong with putting it back in. llvm-svn: 78337
* Reg Scavenging generalization (Thumb support):John Mosby2009-08-061-27/+52
| | | | | | | - start support for new PEI w/reg alloc, allow running RS from emit{Pro,Epi}logue() target hooks. - fix minor issue with recursion detection. llvm-svn: 78318
* Add assertion checks after the calls to LowerFormalArguments, LowerCall,Dan Gohman2009-08-061-1/+34
| | | | | | | and LowerReturn, to verify that the targets' hooks have respected some of their postconditions. llvm-svn: 78312
* Remove an over-aggressive assert. Functions with empty struct returnDan Gohman2009-08-061-3/+0
| | | | | | | types don't have any return values, from CodeGen's perspective. This fixes PR4688. llvm-svn: 78311
* Fix a few places in DAGCombiner that were creating all-ones-bitsDan Gohman2009-08-061-5/+17
| | | | | | | | and high-bits values in ways that weren't correct for integer types wider than 64 bits. This fixes a miscompile in PPMacroExpansion.cpp in clang on x86-64. llvm-svn: 78295
* Privatize the StructType table, which unfortunately involves routing ↵Owen Anderson2009-08-051-5/+5
| | | | | | contexts through a number of APIs. llvm-svn: 78258
* Fix some column padding bugs, reorganize things as suggested by ChrisDavid Greene2009-08-051-2/+16
| | | | | | and eliminate complexity. Yay! llvm-svn: 78243
* remove the 'DataSectionStartSuffix' and 'TextSectionStartSuffix' knobs.Chris Lattner2009-08-051-15/+13
| | | | llvm-svn: 78242
* Rename a variable to make MSVC happy.Benjamin Kramer2009-08-051-3/+3
| | | | llvm-svn: 78202
* Disable stack coloring with register for now. It's not able to set kill markers.Evan Cheng2009-08-051-1/+3
| | | | llvm-svn: 78179
* Another nasty coalescer bug (is there another kind):Evan Cheng2009-08-051-5/+19
| | | | | | | | | | | | | | | | After coalescing reg1027's def and kill are both at the same point: %reg1027,0.000000e+00 = [56,814:0) 0@70-(814) bb5: 60 %reg1027<def> = t2MOVr %reg1027, 14, %reg0, %reg0 68 %reg1027<def> = t2LDRi12 %reg1027<kill>, 8, 14, %reg0 76 t2CMPzri %reg1038<kill,undef>, 0, 14, %reg0, %CPSR<imp-def> 84 %reg1027<def> = t2MOVr %reg1027, 14, %reg0, %reg0 96 t2Bcc mbb<bb5,0x2030910>, 1, %CPSR<kill> Do not remove the kill marker on t2LDRi12. llvm-svn: 78178
* Remove accidental commited commentBruno Cardoso Lopes2009-08-051-2/+0
| | | | llvm-svn: 78177
* - Remove custom handling of jumptables by the elf writter (this wasBruno Cardoso Lopes2009-08-055-108/+206
| | | | | | | | | | | | a dirty hack and isn't need anymore since the last x86 code emitter patch) - Add a target-dependent modifier to addend calculation - Use R_X86_64_32S relocation for X86::reloc_absolute_word_sext - Use getELFSectionFlags whenever possible - fix getTextSection to use TLOF and emit the right text section - Handle global emission for static ctors, dtors and Type::PointerTyID - Some minor fixes llvm-svn: 78176
* add a temporary hook to allow reuse of the asmprinter from the disassembler.Chris Lattner2009-08-051-0/+3
| | | | llvm-svn: 78154
* Turn some insert_subreg, extract_subreg, subreg_to_reg into implicit_defs.Evan Cheng2009-08-052-5/+28
| | | | llvm-svn: 78151
* One more. Transfer kill of the larger register when lowering an EXTRACT_SUBREG.Evan Cheng2009-08-051-4/+6
| | | | llvm-svn: 78145
* One more place where subreg lowering forgot to transfer undefness.Evan Cheng2009-08-051-3/+6
| | | | llvm-svn: 78144
* Major calling convention code refactoring.Dan Gohman2009-08-059-514/+386
| | | | | | | | | | | | | | | | | | | Instead of awkwardly encoding calling-convention information with ISD::CALL, ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering provides three virtual functions for targets to override: LowerFormalArguments, LowerCall, and LowerRet, which replace the custom lowering done on the special nodes. They provide the same information, but in a more immediately usable format. This also reworks much of the target-independent tail call logic. The decision of whether or not to perform a tail call is now cleanly split between target-independent portions, and the target dependent portion in IsEligibleForTailCallOptimization. This also synchronizes all in-tree targets, to help enable future refactoring and feature work. llvm-svn: 78142
* If the insert_subreg source is <undef>, insert an implicit_def instead of a ↵Evan Cheng2009-08-051-2/+8
| | | | | | copy. llvm-svn: 78141
* Various comment fixes.Dan Gohman2009-08-051-3/+8
| | | | llvm-svn: 78139
* Clean up the handling of two-address operands in RegScavenger.Jakob Stoklund Olesen2009-08-041-12/+3
| | | | | | This fixes PR4528. llvm-svn: 78107
* Don't give implicit machine operands special treatment in the register ↵Jakob Stoklund Olesen2009-08-041-5/+2
| | | | | | | | | scavenger. Imp-def is *not* allowed to redefine a live register. Imp-use is *not* allowed to use a dead register. llvm-svn: 78106
* rip out SectionEndDirectiveSuffix support, only uses byChris Lattner2009-08-041-4/+0
| | | | | | | the masm backend. If anyone cares about masm in the future, we'll have semantic sections it can hang off of. llvm-svn: 78096
* Don't tamper with <undef> operands in MachineInstr::addRegisterKilled.Jakob Stoklund Olesen2009-08-041-3/+1
| | | | | | | For an undef operand, MO.getReg() is meaningless and we should not use it. Undef operands should be skipped entirely. llvm-svn: 78095
* LowerSubregsInstructionPass::LowerExtract should not extend the live range ↵Jakob Stoklund Olesen2009-08-041-14/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | of registers. When LowerExtract eliminates an EXTRACT_SUBREG with a kill flag, it moves the kill flag to the place where the sub-register is killed. This can accidentally overlap with the use of a sibling sub-register, and we have trouble. In the test case we have this code: Live Ins: %R0 %R1 %R2 %R2L<def> = EXTRACT_SUBREG %R2<kill>, 1 %R2H<def> = LOAD16fi <fi#-1>, 0, Mem:LD(2,4) [FixedStack-1 + 0] %R1L<def> = EXTRACT_SUBREG %R1<kill>, 1 %R0L<def> = EXTRACT_SUBREG %R0<kill>, 1 %R0H<def> = ADD16 %R2H<kill>, %R2L<kill>, %AZ<imp-def>, %AN<imp-def>, %AC0<imp-def>, %V<imp-def>, %VS<imp-def> subreg: CONVERTING: %R2L<def> = EXTRACT_SUBREG %R2<kill>, 1 subreg: eliminated! subreg: killed here: %R0H<def> = ADD16 %R2H, %R2L, %R2<imp-use,kill>, %AZ<imp-def>, %AN<imp-def>, %AC0<imp-def>, %V<imp-def>, %VS<imp-def> The kill flag on %R2 is moved to the last instruction, and the live range overlaps with the definition of %R2H: *** Bad machine code: Redefining a live physical register *** - function: f - basic block: 0x18358c0 (#0) - instruction: %R2H<def> = LOAD16fi <fi#-1>, 0, Mem:LD(2,4) [FixedStack-1 + 0] Register R2H was defined but already live. The fix is to replace EXTRACT_SUBREG with IMPLICIT_DEF instead of eliminating it completely: subreg: CONVERTING: %R2L<def> = EXTRACT_SUBREG %R2<kill>, 1 subreg: replace by: %R2L<def> = IMPLICIT_DEF %R2<kill> Note that these IMPLICIT_DEF instructions survive to the asm output. It is necessary to fix the stack-color-with-reg test case because of that. llvm-svn: 78093
* Enforce stricter rules in machine code verifier.Jakob Stoklund Olesen2009-08-041-20/+15
| | | | | | | | | | | Implicit operands no longer get a free pass: Imp-use requires a live register and imp-def requires a dead register. There is also no special rule allowing redefinition of a sub-register when the super-register is live. The super register must have imp-kill+imp-def operands instead. llvm-svn: 78090
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