| Commit message (Collapse) | Author | Age | Files | Lines |
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llvm-svn: 81360
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llvm-svn: 81343
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to instructions instead of zero extended ones. This makes the asmprinter
print signed values more consistently. This apparently only really affects
the X86 backend.
llvm-svn: 81265
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instruction to insert before can be end(). getDebugLoc on
end() returns an invalid value, therefore use the debug
loc of the call instruction, and give it to InsertLabel.
llvm-svn: 81207
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Make sure the sub-register class matches the register class of the remat'ed instruction definition register class.
llvm-svn: 81204
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null in the case of an empty struct, so don't try to call getNumValues
on it.
llvm-svn: 81180
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from floating-point to integer first, and bitcast the result
back to floating-point. Previously, this test was passing by
falling back to SelectionDAG lowering. The resulting code isn't
as nice, but it's correct and CodeGen now stays on the fast path.
llvm-svn: 81171
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llvm-svn: 81124
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Patch by Erick Tryzelaar.
llvm-svn: 81116
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about by icc (#593, partial). Patch by Erick Tryzelaar.
llvm-svn: 81115
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llvm-svn: 81112
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icc (#177, partial). Patch by Erick Tryzelaar.
llvm-svn: 81106
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Do not use DenseMap operator[] because it inserts new entry if lookup fails. Use find() to check an entry in a DenseMap first.
llvm-svn: 81058
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llvm-svn: 81055
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a new class, MachineInstrIndex, which hides arithmetic details from
most clients. This is a step towards allowing the register allocator
to update/insert code during allocation.
llvm-svn: 81040
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llvm-svn: 80997
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llvm-svn: 80994
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llvm-svn: 80993
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llvm-svn: 80976
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llvm-svn: 80971
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FastISel to recognize this pattern and emit a floating-point
negation using xor.
llvm-svn: 80963
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llvm-svn: 80962
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wasn't doing the right thing.
llvm-svn: 80958
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for the complicated case where one register is tied to multiple destinations.
This avoids the extra scan of instruction operands that was introduced by
my recent change. I also pulled some code out into a separate
TryInstructionTransform method, added more comments, and renamed some
variables.
Besides all those changes, this takes care of a FIXME in the code regarding
an assumption about there being a single tied use of a register when
converting to a 3-address form. I'm not aware of cases where that assumption
is violated, but the code now only attempts to transform an instruction,
either by commuting its operands or by converting to a 3-address form,
for the simple case where there is a single pair of tied operands.
llvm-svn: 80945
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swapping the operands if necessary.
llvm-svn: 80940
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avoid reloads by reusing clobbered registers.
This was causing issues in 256.bzip2 when compiled with PIC for
a while (starting at r78217), though the problem has since been masked.
llvm-svn: 80872
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llvm-svn: 80798
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llvm-svn: 80773
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to find the kill, since we already have the operand.
llvm-svn: 80736
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llvm-svn: 80733
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llvm-svn: 80731
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least partly unsupported, in X86 encoding at least).
llvm-svn: 80726
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llvm-svn: 80717
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llvm-svn: 80710
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llvm-svn: 80704
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llvm-svn: 80702
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llvm-svn: 80689
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EmitLabel()
llvm-svn: 80677
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tied to different source registers, the TwoAddressInstructionPass needs to
be smarter. Change it to check before replacing a source register whether
that source register is tied to a different destination register, and if so,
defer handling it until a subsequent iteration.
llvm-svn: 80654
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makes an eggregious hack somewhat more palatable. Bringing the LSDA forward
and making it a GV available for reference would be even better, but is
beyond the scope of what I'm looking to solve at this point.
Objective C++ code could generate function names that broke the previous
scheme. This fixes that.
llvm-svn: 80649
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llvm-svn: 80637
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llvm-svn: 80633
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llvm-svn: 80631
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them. Move the code to make that change inside the conditional.
llvm-svn: 80630
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modify the type and location debug information for these variables to match the
programmer's expectations.
llvm-svn: 80625
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llvm-svn: 80621
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llvm-svn: 80602
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llvm-svn: 80601
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handling on x86-32 linux.
llvm-svn: 80592
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Shared landing pads run into trouble with SJLJ, as the dispatch table is
mapped to call sites, and merging the pads will throw that off. There needs
to be a one-to-one mapping of landing pad exception table entries to invoke
call points.
Detecting the shared pad during lowering of SJLJ info insn't sufficient, as
the dispatch function may still need separate destinations to properly
handle phi-nodes.
llvm-svn: 80530
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