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* Don't treat a partial <def,undef> operand as a read.Jakob Stoklund Olesen2011-08-191-1/+2
| | | | | | | | | | | | | | | | | | | | | | | Normally, a partial register def is treated as reading the super-register unless it also defines the full register like this: %vreg110:sub_32bit<def> = COPY %vreg77:sub_32bit, %vreg110<imp-def> This patch also uses the <undef> flag on partial defs to recognize non-reading operands: %vreg110:sub_32bit<def,undef> = COPY %vreg77:sub_32bit This fixes a subtle bug in RegisterCoalescer where LIS->shrinkToUses would treat a coalesced copy as still reading the register, extending the live range artificially. My test case only works when I disable DCE so a dead copy is left for RegisterCoalescer, so I am not including it. <rdar://problem/9967101> llvm-svn: 138018
* add the comments of each declaration follow it, making it easier to read and ↵Renato Golin2011-08-181-49/+44
| | | | | | compare to GCC's result. llvm-svn: 138009
* Eliminate unnecessary forwarding function.Devang Patel2011-08-183-19/+6
| | | | llvm-svn: 138006
* Add new DIE into the map asap.Devang Patel2011-08-181-8/+6
| | | | llvm-svn: 137998
* FastISel: avoid function calls between the materialization of the constant ↵Ivan Krasin2011-08-181-5/+20
| | | | | | and its use. llvm-svn: 137993
* Add the support in code-gen for the landingpad instruction lowering.Bill Wendling2011-08-172-3/+70
| | | | | | | | | | The landingpad instruction is lowered into the EXCEPTIONADDR and EHSELECTION SDNodes. The information from the landingpad instruction is harvested by the 'AddLandingPadInfo' function. The new EH uses the current EH scheme in the back-end. This will change once we switch over to the new scheme. (Reviewed by Jakob!) llvm-svn: 137880
* Revert patch. Forgot a dependent commit.Bill Wendling2011-08-171-39/+3
| | | | llvm-svn: 137875
* Add the body of 'visitLandingPad'.Bill Wendling2011-08-171-3/+39
| | | | | | | | This generates the SDNodes for the new exception handling scheme. It takes the two values coming from the landingpad instruction and assigns them to the EXCEPTIONADDR and EHSELECTION nodes. llvm-svn: 137873
* Modify for the new EH scheme.Bill Wendling2011-08-171-1/+57
| | | | | | | | Things are much saner now. We no longer need to modify the laning pads, because of the invariants we impose upon them. The only thing DwarfEHPrepare needs to do is convert the 'resume' instruction into a call to '_Unwind_Resume'. llvm-svn: 137855
* Until now all debug info MDNodes referred to a root MDNode, a compile unit. ↵Devang Patel2011-08-164-99/+96
| | | | | | | | This simplified handling of these needs in dwarf writer. However, one side effect of this is that during link time optimization all these MDNodes are _not_ uniqued. In other words there will be N number of MDNodes describing "int", "char" and all other types, which would suddenly grow when each object file starts using libraries like STL. MDNodes graph structure such that compiler unit keeps track of important MDNodes and update dwarf writer to process mdnodes top-down instead of bottom up. llvm-svn: 137778
* Remove unused Target argument from AsmParser construction methods.Jim Grosbach2011-08-161-1/+1
| | | | | | The argument is unused, and is a layering violation in any case. llvm-svn: 137735
* Remove unnecessary version check.Devang Patel2011-08-161-2/+1
| | | | llvm-svn: 137728
* Revert r137562 because it caused PR10674Nadav Rotem2011-08-161-7/+0
| | | | llvm-svn: 137719
* Refactor.Devang Patel2011-08-152-49/+68
| | | | llvm-svn: 137689
* Continue to hoist uses of getCompileUnit() up. The goal is to get rid of ↵Devang Patel2011-08-152-21/+24
| | | | | | uses of getCompileUnit(). llvm-svn: 137683
* This is somewhat déjà-vu, but avoid using getCompileUnit() as much as ↵Devang Patel2011-08-152-14/+14
| | | | | | possible. llvm-svn: 137668
* Refactor. Variables are part of compile unit so let CompileUnit create new ↵Devang Patel2011-08-154-123/+129
| | | | | | variable. llvm-svn: 137663
* There is no need to maintain a set to keep track of variables that use ↵Devang Patel2011-08-152-8/+2
| | | | | | location expressions. In such cases, AT_location attribute's value will be a label. llvm-svn: 137659
* Fix warning.Devang Patel2011-08-152-2/+2
| | | | llvm-svn: 137658
* Simplify. Let DbgVariable keep track of variable's DBG_VALUE machine ↵Devang Patel2011-08-152-55/+24
| | | | | | instruction. llvm-svn: 137656
* Simplify mapping to variable from its abstract variable info.Devang Patel2011-08-152-29/+18
| | | | | | When a variable is inlined multiple places, abstract variable keeps name, location, type etc.. info and all other concreate instances of the variable directly refers to abstract variable. llvm-svn: 137637
* Refactor.Devang Patel2011-08-152-5/+11
| | | | llvm-svn: 137632
* Refactor.Devang Patel2011-08-152-15/+9
| | | | llvm-svn: 137631
* Refactor. Global variables are part of compile unit so let CompileUnit ↵Devang Patel2011-08-153-129/+114
| | | | | | create new global variable. llvm-svn: 137621
* Refactor. A subprogram is part of compile unit so let CompileUnit construct ↵Devang Patel2011-08-154-114/+141
| | | | | | new subprogram. llvm-svn: 137618
* Fix PR 10635. When generating integer constants, the constant element type mayNadav Rotem2011-08-131-0/+7
| | | | | | | be illegal, even if the requested vector type is legal. Testcase is one of the disabled ARM tests in the vector-select patch. llvm-svn: 137562
* Initial commit of the 'landingpad' instruction.Bill Wendling2011-08-122-0/+4
| | | | | | | | | | | | This implements the 'landingpad' instruction. It's used to indicate that a basic block is a landing pad. There are several restrictions on its use (see LangRef.html for more detail). These restrictions allow the exception handling code to gather the information it needs in a much more sane way. This patch has the definition, implementation, C interface, parsing, and bitcode support in it. llvm-svn: 137501
* Use ArrayRef.Devang Patel2011-08-121-6/+6
| | | | llvm-svn: 137485
* switch to use the new api for structtypes.Chris Lattner2011-08-121-4/+4
| | | | llvm-svn: 137480
* Provide fast path as Jakob suggested.Devang Patel2011-08-121-0/+12
| | | | llvm-svn: 137478
* Revert r137310 because it does not optimize any code on ToTNadav Rotem2011-08-121-32/+0
| | | | llvm-svn: 137466
* Silence a bunch (but not all) "variable written but not read" warningsDuncan Sands2011-08-126-3/+7
| | | | | | when building with assertions disabled. llvm-svn: 137460
* Simplify the interference checking code a bit.Jakob Stoklund Olesen2011-08-122-112/+42
| | | | | | | This is possible now that we now longer provide an interface to iterate the interference overlaps. llvm-svn: 137397
* Remove the InterferenceResult class.Jakob Stoklund Olesen2011-08-111-32/+0
| | | | llvm-svn: 137381
* Eliminate the last use of InterferenceResult.Jakob Stoklund Olesen2011-08-112-63/+57
| | | | | | | | The Query class now holds two iterators instead of an InterferenceResult instance. The iterators are used as bookmarks for repeated collectInterferingVRegs calls. llvm-svn: 137380
* Remove more dead code.Jakob Stoklund Olesen2011-08-112-37/+3
| | | | | | | collectInterferingVRegs will be the primary function for interference checks. llvm-svn: 137354
* Privatize an unused part of the LiveIntervalUnion::Query interface.Jakob Stoklund Olesen2011-08-112-19/+13
| | | | | | No clients are iterating over interference overlaps. llvm-svn: 137350
* Remove some dead code.Jakob Stoklund Olesen2011-08-112-39/+0
| | | | | | | | The InterferenceResult iterator turned out to be less important than we thought it would be. LiveIntervalUnion clients want higher level information, like the list of interfering virtual registers. llvm-svn: 137346
* Plug a memory leak.Benjamin Kramer2011-08-111-3/+3
| | | | llvm-svn: 137321
* [AVX] When joining two XMM registers into a YMM register, make sure that theNadav Rotem2011-08-111-0/+32
| | | | | | | lower XMM register gets in first. This will allow the SUBREG pattern to elliminate the first vector insertion. llvm-svn: 137310
* fix PR10605 / rdar://9930964 by adding a pretty scary missed check.Chris Lattner2011-08-111-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | It's somewhat surprising anything works without this. Before we would compile the testcase into: test: # @test movl $4, 8(%rdi) movl 8(%rdi), %eax orl %esi, %eax cmpl $32, %edx movl %eax, -4(%rsp) # 4-byte Spill je .LBB0_2 now we produce: test: # @test movl 8(%rdi), %eax movl $4, 8(%rdi) orl %esi, %eax cmpl $32, %edx movl %eax, -4(%rsp) # 4-byte Spill je .LBB0_2 llvm-svn: 137303
* Stay within 80 columns.Devang Patel2011-08-102-22/+34
| | | | llvm-svn: 137283
* Distinguish between two copies of one inlined variable. Take 2.Devang Patel2011-08-101-3/+4
| | | | llvm-svn: 137253
* While extending definition range of a debug variable, consult lexical scopes ↵Devang Patel2011-08-101-10/+22
| | | | | | also. There is no point extending debug variable out side its lexical block. This provides 6x compile time speedup in some cases. llvm-svn: 137250
* Revert unintentional parts of previous check-in.Devang Patel2011-08-101-5/+2
| | | | llvm-svn: 137249
* Start using LexicalScopes utility. No intetional functionality change.Devang Patel2011-08-102-526/+113
| | | | llvm-svn: 137246
* Provide utility to extract and use lexical scoping information from machine ↵Devang Patel2011-08-102-0/+306
| | | | | | instructions. llvm-svn: 137237
* Trim an unneeded header.Jakob Stoklund Olesen2011-08-092-0/+2
| | | | llvm-svn: 137184
* Inflate register classes after coalescing.Jakob Stoklund Olesen2011-08-091-2/+35
| | | | | | | | | | | | | | | | | | | | | | | Coalescing can remove copy-like instructions with sub-register operands that constrained the register class. Examples are: x86: GR32_ABCD:sub_8bit_hi -> GR32 arm: DPR_VFP2:ssub0 -> DPR Recompute the register class of any virtual registers that are used by less instructions after coalescing. This affects code generation for the Cortex-A8 where we use NEON instructions for f32 operations, c.f. fp_convert.ll: vadd.f32 d16, d1, d0 vcvt.s32.f32 d0, d16 The register allocator is now free to use d16 for the temporary, and that comes first in the allocation order because it doesn't interfere with any s-registers. llvm-svn: 137133
* Move CalculateRegClass to MRI::recomputeRegClass.Jakob Stoklund Olesen2011-08-093-34/+36
| | | | | | | | This function doesn't have anything to do with spill weights, and MRI already has functions for manipulating the register class of a virtual register. llvm-svn: 137123
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