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| author | Nadav Rotem <nadav.rotem@intel.com> | 2011-08-16 14:34:29 +0000 |
|---|---|---|
| committer | Nadav Rotem <nadav.rotem@intel.com> | 2011-08-16 14:34:29 +0000 |
| commit | b66b866f46af597de96f115e7d4501189c356232 (patch) | |
| tree | ea32852b7d93361bdd96ddaff4c2f27e0998086a /llvm/lib/CodeGen | |
| parent | 719a72f34c09166c3bfd046a47e9522cea11db8e (diff) | |
| download | bcm5719-llvm-b66b866f46af597de96f115e7d4501189c356232.tar.gz bcm5719-llvm-b66b866f46af597de96f115e7d4501189c356232.zip | |
Revert r137562 because it caused PR10674
llvm-svn: 137719
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index ab6af1b4d17..8b353a28b6b 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -928,13 +928,6 @@ SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { assert(Val.getBitWidth() == EltVT.getSizeInBits() && "APInt size does not match type size!"); - // In some cases the vector type is legal but the element type is illegal. - // In this case, promote the inserted value. The type does not need to match - // the vector element type. Any extra bits introduced will be - // truncated away. - if (VT.isVector()) - EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT); - unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; FoldingSetNodeID ID; AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); |
