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* Implement ComputeLatency for MachineInstr ScheduleDAGs. FactorDan Gohman2008-11-212-8/+19
| | | | | | | | some of the latency computation logic out of the SDNode ScheduleDAG code into a TargetInstrItineraries helper method to help with this. llvm-svn: 59761
* Add UADDO and SADDO nodes. These will be used for determining an overflowBill Wendling2008-11-211-0/+2
| | | | | | condition in an addition operation. llvm-svn: 59760
* Change these schedulers to not emit no-ops. It turns out thatDan Gohman2008-11-212-9/+3
| | | | | | | | | the RR scheduler actually does look at latency values, but it doesn't use a hazard recognizer so it has no way to know when a no-op is needed, as opposed to just stalling and incrementing the cycle count. llvm-svn: 59759
* Treat mid-block labels the same as terminators when building theDan Gohman2008-11-201-1/+1
| | | | | | | | | | MachineInstr scheduling DAG, meaning they implicitly depend on all preceding defs. This fixes Benchmarks/Shootout-C++/except and Regression/C++/EH/simple_rethrow in -relocation-model=pic -disable-post-RA-scheduler=false mode. llvm-svn: 59747
* Add another machine-code printing pass when post-pass scheduling is run.Dan Gohman2008-11-201-1/+5
| | | | llvm-svn: 59746
* Add some documentation.Duncan Sands2008-11-201-1/+28
| | | | llvm-svn: 59727
* 80-column violation.Bill Wendling2008-11-201-2/+4
| | | | llvm-svn: 59718
* Remove a remnant of list-burr's fast mode.Dan Gohman2008-11-201-20/+0
| | | | llvm-svn: 59702
* Factor out the SethiUllman numbering logic from the list-burr andDan Gohman2008-11-201-159/+47
| | | | | | list-tdrr schedulers into a common base class. llvm-svn: 59701
* Remove the "fast" form of the list-burr scheduler, and use theDan Gohman2008-11-202-74/+15
| | | | | | | | | dedicated "fast" scheduler in -fast mode instead, which is faster. This speeds up llc -fast by a few percent on some testcases -- the speedup only happens for code not handled by fast-isel. llvm-svn: 59700
* Facter AddPseudoTwoAddrDeps and associated infrasructure out ofDan Gohman2008-11-201-43/+60
| | | | | | | the list-burr scheduler so that it can be used by the list-tdrr scheduler too. llvm-svn: 59698
* - Register scavenger should use MachineRegisterInfo and internal map to find ↵Evan Cheng2008-11-201-32/+62
| | | | | | | | | the first use of a register after a given machine instruction. - When scavenging a register, in addition to the spill, insert a restore before the first use. - Abort if client is looking to scavenge a register even when a previously scavenged register is still live. llvm-svn: 59697
* Add #include <climits> to get the definition of INT_MAX.Dan Gohman2008-11-201-0/+1
| | | | llvm-svn: 59692
* Factor out the code for verifying the work of the scheduler,Dan Gohman2008-11-204-87/+58
| | | | | | | extend it a bit, and make use of it in all schedulers, to ensure consistent checking. llvm-svn: 59689
* Simplify this code a little. In the fast scheduler, CreateNewSUnitDan Gohman2008-11-191-17/+5
| | | | | | and CreateClone don't add any extra value. llvm-svn: 59679
* Experimental post-pass scheduling support. Post-pass schedulingDan Gohman2008-11-1917-824/+1012
| | | | | | | | | | | | | | | | | is currently off by default, and can be enabled with -disable-post-RA-scheduler=false. This doesn't have a significant impact on most code yet because it doesn't yet do anything to address anti-dependencies and it doesn't attempt to disambiguate memory references. Also, several popular targets don't have pipeline descriptions yet. The majority of the changes here are splitting the SelectionDAG-specific code out of ScheduleDAG, so that ScheduleDAG can be moved to libLLVMCodeGen.a. The interface between ScheduleDAG-using code and the rest of the scheduling code is somewhat rough and will evolve. llvm-svn: 59676
* Move the code for printing a graph node label for an SUnit intoDan Gohman2008-11-192-22/+19
| | | | | | a virtual method of SelectionDAG. llvm-svn: 59667
* Convert SUnit's dump method into a print method and implementDan Gohman2008-11-191-6/+10
| | | | | | dump in terms of it. llvm-svn: 59665
* Fix compilation error on MSVC.Argyrios Kyrtzidis2008-11-191-1/+1
| | | | llvm-svn: 59629
* Add support for rematerialization in pre-alloc-splitting.Owen Anderson2008-11-191-3/+95
| | | | llvm-svn: 59587
* Rearrange code to reduce the nesting level. No functionality change.Dan Gohman2008-11-191-36/+36
| | | | llvm-svn: 59580
* Fix debug printing of flagged SDNodes in SUnits so that theyDan Gohman2008-11-191-12/+12
| | | | | | print in the correct order. llvm-svn: 59567
* Make the same change to RegScavenger::backward.Evan Cheng2008-11-181-9/+28
| | | | llvm-svn: 59566
* We also need to keep the operand index for two address check.Evan Cheng2008-11-181-9/+11
| | | | llvm-svn: 59562
* Register scavenger should process early clobber defs first. A dead early ↵Evan Cheng2008-11-181-23/+37
| | | | | | clobber def should not interfere with a normal def which happens one slot later. llvm-svn: 59559
* Tidy up ScheduleNodeBottomUp methods, and make them moreDan Gohman2008-11-182-10/+8
| | | | | | consistent with ScheduleNodeTopDown methods. llvm-svn: 59550
* Update a comment to reflect the current code.Dan Gohman2008-11-181-3/+2
| | | | llvm-svn: 59549
* Remove integer promotion support for FP_EXTENDDuncan Sands2008-11-182-16/+1
| | | | | | | | | and FP_ROUND. Not sure what these were doing here - probably they were sometimes (wrongly) created with integer operands somewhere that has since been fixed. llvm-svn: 59548
* Simplify code using helper routines. There is notDuncan Sands2008-11-182-67/+53
| | | | | | supposed to be any functionality change. llvm-svn: 59545
* Fix a bug introduced by my previous patch. With this change, SPEC is now ↵Owen Anderson2008-11-181-1/+1
| | | | | | clean with prealloc splitting enabled. llvm-svn: 59544
* Add more const qualifiers. This fixes build breakage from r59540.Dan Gohman2008-11-181-1/+1
| | | | llvm-svn: 59542
* Make some methods const.Dan Gohman2008-11-181-2/+4
| | | | llvm-svn: 59540
* Whitespace cleanups.Dan Gohman2008-11-181-2/+2
| | | | llvm-svn: 59532
* LegalizeTypes support for splitting and scalarizingDuncan Sands2008-11-182-11/+27
| | | | | | | | SCALAR_TO_VECTOR. I didn't add the testcase, because once llc gets past scalar-to-vector it hits a SPU target lowering bug and explodes. llvm-svn: 59530
* Rename stackprotector_create intrinsic to stackprotector.Bill Wendling2008-11-182-2/+2
| | | | llvm-svn: 59519
* Reapply r59464, this time using the correct typeDuncan Sands2008-11-182-4/+188
| | | | | | when softening FNEG. llvm-svn: 59513
* Remove the stackprotector_check intrinsic. Use a volatile load instead.Bill Wendling2008-11-182-19/+4
| | | | llvm-svn: 59504
* - Use "moveAfter" instead of "remove/insert" of a basic block.Bill Wendling2008-11-181-103/+104
| | | | | | | | | - Use less indentation in coding. - Shorten description. - Update comments. - Move code around llvm-svn: 59496
* Fix a typo in a comment.Dan Gohman2008-11-181-1/+1
| | | | llvm-svn: 59489
* Change SUnit's dump method to take a ScheduleDAG* instead ofDan Gohman2008-11-184-23/+23
| | | | | | a SelectionDAG*. llvm-svn: 59488
* Revert r59464. It was causing this failure:Bill Wendling2008-11-182-188/+4
| | | | | | | | | | | | | | | | | | Running /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/XCore/dg.exp ... FAIL: /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/XCore/fneg.ll Failed with signal(SIGABRT) at line 1 while running: llvm-as < /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/XCore/fneg.ll | llc -march=xcore > fneg.ll.tmp1.s Assertion failed: (VT.isFloatingPoint() && "Cannot create integer FP constant!"), function getConstantFP, file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/SelectionDAG/SelectionDAG.cpp, line 913. 0 llc 0x0092115c _ZN4llvm3sys18RemoveFileOnSignalERKNS0_4PathEPSs + 844 1 libSystem.B.dylib 0x9217809b _sigtramp + 43 2 ??? 0xffffffff 0x0 + 4294967295 3 libSystem.B.dylib 0x921f0ec2 raise + 26 4 libSystem.B.dylib 0x9220047f abort + 73 5 libSystem.B.dylib 0x921f2063 __assert_rtn + 101 6 llc 0x005a5b0a _ZN4llvm12SelectionDAG13getConmake[1]: *** [check-local] Error 1 make: *** [check] Error 2 llvm-svn: 59487
* Avoid using a loop in ReleasePred and ReleaseSucc methods to compute theDan Gohman2008-11-183-55/+64
| | | | | | | | | | | | | new CycleBound value. Instead, just update CycleBound on each call. Also, make ReleasePred and ReleaseSucc methods more consistent accross the various schedulers. This also happens to make ScheduleDAGRRList's CycleBound computation somewhat more interesting, though it still doesn't have any noticeable effect, because no current targets that use the register-pressure reduction scheduler provide pipeline models. llvm-svn: 59475
* Eliminate some trivial differences between the ScheduleNodeTopDownDan Gohman2008-11-172-6/+8
| | | | | | functions in these two schedulers. llvm-svn: 59465
* Add soft float support for a bunch more operations. OriginalDuncan Sands2008-11-172-4/+188
| | | | | | | patch by Richard Osborne, tweaked and extended by your humble servant. llvm-svn: 59464
* Don't bother doing latency calculations in the "fast" scheduler.Dan Gohman2008-11-171-15/+5
| | | | llvm-svn: 59461
* Use SUnit's CycleBound field instead of duplicating it inDan Gohman2008-11-171-8/+9
| | | | | | a side-car datastructure llvm-svn: 59458
* Don't produce ADDC/ADDE when expanding SHL unless they are legalRichard Osborne2008-11-171-1/+2
| | | | | | for the target. This fixes PR3080. llvm-svn: 59450
* Don't use the isPending flag to mean what the isAvailable flag means.Dan Gohman2008-11-172-2/+2
| | | | llvm-svn: 59445
* Fixed legalization of CONVERT_RNDSAT for integers.Mon P Wang2008-11-172-24/+16
| | | | llvm-svn: 59432
* Big PBQP allocator update. Adds coalescing support, stack slot coloring, ↵Lang Hames2008-11-161-139/+478
| | | | | | several bug-fixes. llvm-svn: 59414
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