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* Revise r126127 to address Daniel's comments. <rdar://problem/9012638>Stuart Hastings2011-03-191-7/+4
| | | | llvm-svn: 127939
* Beginnings of MC-JIT code generation.Jim Grosbach2011-03-181-0/+26
| | | | | | | | | | | Proof-of-concept code that code-gens a module to an in-memory MachO object. This will be hooked up to a run-time dynamic linker library (see: llvm-rtdyld for similarly conceptual work for that part) which will take the compiled object and link it together with the rest of the system, providing back to the JIT a table of available symbols which will be used to respond to the getPointerTo*() queries. llvm-svn: 127916
* Extend live debug values down the dominator tree by following copies.Jakob Stoklund Olesen2011-03-181-24/+136
| | | | | | | | | | | | | | | | | The llvm.dbg.value intrinsic refers to SSA values, not virtual registers, so we should be able to extend the range of a value by tracking that value through register copies. This greatly improves the debug value tracking for function arguments that for some reason are copied to a second virtual register at the end of the entry block. We only extend the debug value range where its register is killed. All original llvm.dbg.value locations are still respected. Copies from physical registers are ignored. That should not be a problem since the entry block already adds DBG_VALUE instructions for the virtual registers holding the function arguments. llvm-svn: 127912
* Hoist spills when the same value is known to be in less loopy sibling registers.Jakob Stoklund Olesen2011-03-181-22/+148
| | | | | | | | | | | | | | Stack slot real estate is virtually free compared to registers, so it is advantageous to spill earlier even though the same value is now kept in both a register and a stack slot. Also eliminate redundant spills by extending the stack slot live range underneath reloaded registers. This can trigger a dead code elimination, removing copies and even reloads that were only feeding spills. llvm-svn: 127868
* Accept instructions that read undefined values.Jakob Stoklund Olesen2011-03-181-1/+9
| | | | | | | This is not supposed to happen, but I have seen the x86 rematter getting confused when rematerializing partial redefs. llvm-svn: 127857
* Be more accurate about the slot index reading a register when dealing with defsJakob Stoklund Olesen2011-03-181-4/+20
| | | | | | | | and early clobbers. Assert when trying to find an undefined value. llvm-svn: 127856
* BuildUDIV: If the divisor is even we can simplify the fixup of the ↵Benjamin Kramer2011-03-171-9/+22
| | | | | | | | | | | | | | | | | | | | | | | multiplied value by introducing an early shift. This allows us to compile "unsigned foo(unsigned x) { return x/28; }" into shrl $2, %edi imulq $613566757, %rdi, %rax shrq $32, %rax ret instead of movl %edi, %eax imulq $613566757, %rax, %rcx shrq $32, %rcx subl %ecx, %eax shrl %eax addl %ecx, %eax shrl $4, %eax on x86_64 llvm-svn: 127829
* Dead code elimination may separate the live interval into multiple connected ↵Jakob Stoklund Olesen2011-03-175-22/+44
| | | | | | | | | components. I have convinced myself that it can only happen when a phi value dies. When it happens, allocate new virtual registers for the components. llvm-svn: 127827
* Move more logic into getTypeForExtArgOrReturn.Cameron Zwarich2011-03-171-6/+2
| | | | llvm-svn: 127809
* Rename getTypeForExtendedInteger() to getTypeForExtArgOrReturn().Cameron Zwarich2011-03-171-1/+1
| | | | llvm-svn: 127807
* Rewrite instructions as part of ConnectedVNInfoEqClasses::Distribute.Jakob Stoklund Olesen2011-03-173-47/+34
| | | | llvm-svn: 127779
* Add a LiveRangeEdit delegate callback before shrinking a live range.Jakob Stoklund Olesen2011-03-163-1/+19
| | | | | | The register allocator needs to adjust its live interval unions when that happens. llvm-svn: 127774
* Erase virtual registers that are unused after DCE.Jakob Stoklund Olesen2011-03-161-4/+12
| | | | llvm-svn: 127773
* Tag cached interference with a user-provided tag instead of the virtual ↵Jakob Stoklund Olesen2011-03-163-7/+16
| | | | | | | | | register number. The live range of a virtual register may change which invalidates the cached interference information. llvm-svn: 127772
* Clarify debugging output.Jakob Stoklund Olesen2011-03-163-7/+17
| | | | llvm-svn: 127771
* The x86-64 ABI says that a bool is only guaranteed to be sign-extended to a byteCameron Zwarich2011-03-161-5/+2
| | | | | | | | | | | rather than an int. Thankfully, this only causes LLVM to miss optimizations, not generate incorrect code. This just fixes the zext at the return. We still insert an i32 ZextAssert when reading a function's arguments, but it is followed by a truncate and another i8 ZextAssert so it is not optimized. llvm-svn: 127766
* Don't recompute something that we already have in a local variable.Cameron Zwarich2011-03-161-2/+2
| | | | llvm-svn: 127764
* Revert r127757, "Patch to a fix dwarf relocation problem on ARM. One-line fixDaniel Dunbar2011-03-161-5/+2
| | | | | | | plus the test where it used to break.", which broke Clang self-host of a Debug+Asserts compiler, on OS X. llvm-svn: 127763
* Patch to a fix dwarf relocation problem on ARM. One-line fix plus the test ↵Renato Golin2011-03-161-2/+5
| | | | | | where it used to break. llvm-svn: 127757
* Trace back through sibling copies to hoist spills and find rematerializable ↵Jakob Stoklund Olesen2011-03-151-10/+208
| | | | | | | | | | | | | defs. After live range splitting, an original value may be available in multiple registers. Tracing back through the registers containing the same value, find the best place to insert a spill, determine if the value has already been spilled, or discover a reaching def that may be rematerialized. This is only the analysis part. The information is not used for anything yet. llvm-svn: 127698
* Preserve both isPHIDef and isDefByCopy bits when copying parent values.Jakob Stoklund Olesen2011-03-151-5/+4
| | | | llvm-svn: 127697
* Add a peephole optimization to optimize pairs of bitcasts. e.g.Evan Cheng2011-03-151-4/+97
| | | | | | | | | | | | | | | | | | | | | | v2 = bitcast v1 ... v3 = bitcast v2 ... = v3 => v2 = bitcast v1 ... = v1 if v1 and v3 are of in the same register class. bitcast between i32 and fp (and others) are often not nops since they are in different register classes. These bitcast instructions are often left because they are in different basic blocks and cannot be eliminated by dag combine. rdar://9104514 llvm-svn: 127668
* sext(undef) = 0, because the top bits will all be the same.Evan Cheng2011-03-151-1/+5
| | | | | | zext(undef) = 0, because the top bits will be zero. llvm-svn: 127649
* There are some situations which can cause the URoR hack to infinitely recurseBill Wendling2011-03-151-6/+8
| | | | | | | | | | | | | and then go kablooie. The problem was that it was tracking the PHI nodes anew each time into this function. But it didn't need to. And because the recursion didn't know that a PHINode was visited before, it would go ahead and call itself. There is a testcase, but unfortunately it's too big to add. This problem will go away with the EH rewrite. <rdar://problem/8856298> llvm-svn: 127640
* Place context in member variables instead of passing around pointers.Jakob Stoklund Olesen2011-03-141-21/+18
| | | | | | Use the opportunity to get rid of the trailing underscore variable names. llvm-svn: 127618
* Rename members to match LLVM naming conventions more closely.Jakob Stoklund Olesen2011-03-141-111/+109
| | | | | | | | Remove the unused reserved_ bit vector, no functional change intended. This doesn't break 'svn blame', this file really is all my fault. llvm-svn: 127607
* BIT_CONVERT has been renamed to BITCAST.Evan Cheng2011-03-141-1/+1
| | | | llvm-svn: 127600
* Minor optimization. sign-ext/anyext of undef is still undef.Evan Cheng2011-03-141-0/+4
| | | | llvm-svn: 127598
* Now that we are deleting unused live intervals during allocation, pointers ↵Jakob Stoklund Olesen2011-03-131-2/+4
| | | | | | | | may be reused. Use the virtual register number as a cache tag instead. They are not reused. llvm-svn: 127561
* Tell the register allocator about new unused virtual registers.Jakob Stoklund Olesen2011-03-134-1/+26
| | | | | | | This allows the allocator to free any resources used by the virtual register, including physical register assignments. llvm-svn: 127560
* Speculatively revert commit 127478 (jsjodin) in an attempt to fix theDuncan Sands2011-03-121-0/+7
| | | | | | | | | | llvm-gcc-i386-linux-selfhost and llvm-x86_64-linux-checks buildbots. The original log entry: Remove optimization emitting a reference insted of label difference, since it can create more relocations. Removed isBaseAddressKnownZero method, because it is no longer used. llvm-svn: 127540
* Include snippets in the live stack interval.Jakob Stoklund Olesen2011-03-121-1/+3
| | | | llvm-svn: 127530
* Spill multiple registers at once.Jakob Stoklund Olesen2011-03-122-48/+210
| | | | | | | | | | | Live range splitting can create a number of small live ranges containing only a single real use. Spill these small live ranges along with the large range they are connected to with copies. This enables memory operand folding and maximizes the spill to fill distance. Work in progress with known bugs. llvm-svn: 127529
* That's it, I am declaring this a failure of the C++03 STL.Jakob Stoklund Olesen2011-03-121-119/+15
| | | | | | | | | | | | | | There are too many compatibility problems with using mixed types in std::upper_bound, and I don't want to spend 110 lines of boilerplate setting up a call to a 10-line function. Binary search is not /that/ hard to implement correctly. I tried terminating the binary search with a linear search, but that actually made the algorithm slower against my expectation. Most live intervals have less than 4 segments. The early test against endIndex() does pay, and this version is 25% faster than plain std::upper_bound(). llvm-svn: 127522
* Fix the GCC test suite issue exposed by r127477, which was caused by stackCameron Zwarich2011-03-111-3/+3
| | | | | | | protector insertion not working correctly with unreachable code. Since that revision was rolled out, this test doesn't actual fail before this fix. llvm-svn: 127497
* Teach FastISel to support register-immediate-immediate instructions.Owen Anderson2011-03-111-0/+23
| | | | llvm-svn: 127496
* Remove optimization emitting a reference insted of label difference, since ↵Jan Sjödin2011-03-111-7/+0
| | | | | | it can create more relocations. Removed isBaseAddressKnownZero method, because it is no longer used. llvm-svn: 127478
* Replace -dag-chain-limit flag with constant. It has survived a release cycle ↵Andrew Trick2011-03-111-3/+1
| | | | | | without being touched, so no longer needs to pollute the hidden-help text. llvm-svn: 127468
* Fix use of CompEnd predicate to be standards conformingJohn Wiegley2011-03-111-9/+111
| | | | | | | | | | | | | The existing CompEnd predicate does not define a strict weak order as required by the C++03 standard; therefore, its use as a predicate to std::upper_bound is invalid. For a discussion of this issue, see http://www.open-std.org/jtc1/sc22/wg21/docs/lwg-defects.html#270 This patch replaces the asymmetrical comparison with an iterator adaptor that achieves the same effect while being strictly standard-conforming by ensuring an apples-to-apples comparison. llvm-svn: 127462
* Avoid replacing the value of a directly stored load with the stored value if ↵Evan Cheng2011-03-111-2/+1
| | | | | | the load is indexed. rdar://9117613. llvm-svn: 127440
* Add an option to disable critical edge splitting in PHIElimination.Cameron Zwarich2011-03-101-4/+12
| | | | llvm-svn: 127398
* Change the Spiller interface to take a LiveRangeEdit reference.Jakob Stoklund Olesen2011-03-107-50/+34
| | | | | | | This makes it possible to register delegates and get callbacks when the spiller edits live ranges. llvm-svn: 127389
* Make SpillIs an optional pointer. Avoid creating a bunch of temporary ↵Jakob Stoklund Olesen2011-03-109-27/+22
| | | | | | SmallVectors. llvm-svn: 127388
* Re-commit 127368 and 127371. They are exonerated.Evan Cheng2011-03-102-10/+23
| | | | llvm-svn: 127380
* Revert 127368 and 127371 for now.Evan Cheng2011-03-092-23/+10
| | | | llvm-svn: 127376
* Change the definition of TargetRegisterInfo::getCrossCopyRegClass to be moreEvan Cheng2011-03-092-10/+23
| | | | | | | | | | | | | flexible. If it returns a register class that's different from the input, then that's the register class used for cross-register class copies. If it returns a register class that's the same as the input, then no cross- register class copies are needed (normal copies would do). If it returns null, then it's not at all possible to copy registers of the specified register class. llvm-svn: 127368
* Make physreg coalescing independent on the number of uses of the virtual ↵Jakob Stoklund Olesen2011-03-091-3/+1
| | | | | | | | | | | | | | | | | register. The damage done by physreg coalescing only depends on the number of instructions the extended physreg live range covers. This fixes PR9438. The heuristic is still luck-based, and physreg coalescing really should be disabled completely. We need a register allocator with better hinting support before that is possible. Convert a test to FileCheck and force spilling by inserting an extra call. The previous spilling behavior was dependent on misguided physreg coalescing decisions. llvm-svn: 127351
* Improve pre-RA-sched register pressure tracking for duplicate operands.Andrew Trick2011-03-091-1/+5
| | | | | | This helps cases like 2008-07-19-movups-spills.ll, but doesn't have an obvious impact on benchmarks llvm-svn: 127347
* Fix typo, make helper static.Benjamin Kramer2011-03-091-3/+3
| | | | llvm-svn: 127335
* Remove unused virtual dtor.Benjamin Kramer2011-03-091-1/+0
| | | | llvm-svn: 127331
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