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| author | Owen Anderson <resistor@mac.com> | 2011-03-11 21:33:55 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2011-03-11 21:33:55 +0000 |
| commit | 66443c034d13ce289a58da2eb5f040eb756fe57b (patch) | |
| tree | 07de16ba649c8eb38afde9d75f3ee1f4866dbafb /llvm/lib/CodeGen | |
| parent | ec62d28ae1dee99913ef0b046f2d3d8b60ca941d (diff) | |
| download | bcm5719-llvm-66443c034d13ce289a58da2eb5f040eb756fe57b.tar.gz bcm5719-llvm-66443c034d13ce289a58da2eb5f040eb756fe57b.zip | |
Teach FastISel to support register-immediate-immediate instructions.
llvm-svn: 127496
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/FastISel.cpp | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp b/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp index 490b857b0e9..ea8ace38bd3 100644 --- a/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp @@ -1099,6 +1099,29 @@ unsigned FastISel::FastEmitInst_ri(unsigned MachineInstOpcode, return ResultReg; } +unsigned FastISel::FastEmitInst_rii(unsigned MachineInstOpcode, + const TargetRegisterClass *RC, + unsigned Op0, bool Op0IsKill, + uint64_t Imm1, uint64_t Imm2) { + unsigned ResultReg = createResultReg(RC); + const TargetInstrDesc &II = TII.get(MachineInstOpcode); + + if (II.getNumDefs() >= 1) + BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II, ResultReg) + .addReg(Op0, Op0IsKill * RegState::Kill) + .addImm(Imm1) + .addImm(Imm2); + else { + BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II) + .addReg(Op0, Op0IsKill * RegState::Kill) + .addImm(Imm1) + .addImm(Imm2); + BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(TargetOpcode::COPY), + ResultReg).addReg(II.ImplicitDefs[0]); + } + return ResultReg; +} + unsigned FastISel::FastEmitInst_rf(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, |
