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* Indent multiline asm strings more nicelyChris Lattner2006-05-051-5/+9
| | | | llvm-svn: 28132
* Fold (fpext (load x)) -> (extload x)Chris Lattner2006-05-051-0/+14
| | | | llvm-svn: 28130
* More aggressively sink GEP offsets into loops. For example, before weChris Lattner2006-05-051-56/+115
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | generated: movl 8(%esp), %eax movl %eax, %edx addl $4316, %edx cmpb $1, %cl ja LBB1_2 #cond_false LBB1_1: #cond_true movl L_QuantizationTables720$non_lazy_ptr, %ecx movl %ecx, (%edx) movl L_QNOtoQuantTableShift720$non_lazy_ptr, %edx movl %edx, 4460(%eax) ret ... Now we generate: movl 8(%esp), %eax cmpb $1, %cl ja LBB1_2 #cond_false LBB1_1: #cond_true movl L_QuantizationTables720$non_lazy_ptr, %ecx movl %ecx, 4316(%eax) movl L_QNOtoQuantTableShift720$non_lazy_ptr, %ecx movl %ecx, 4460(%eax) ret ... which uses one fewer register. llvm-svn: 28129
* Fold some common code.Chris Lattner2006-05-051-14/+2
| | | | llvm-svn: 28124
* Implement:Chris Lattner2006-05-051-5/+7
| | | | | | | | | | | // fold (and (sext x), (sext y)) -> (sext (and x, y)) // fold (or (sext x), (sext y)) -> (sext (or x, y)) // fold (xor (sext x), (sext y)) -> (sext (xor x, y)) // fold (and (aext x), (aext y)) -> (aext (and x, y)) // fold (or (aext x), (aext y)) -> (aext (or x, y)) // fold (xor (aext x), (aext y)) -> (aext (xor x, y)) llvm-svn: 28123
* Pull and through and/or/xor. This compiles some bitfield code to:Chris Lattner2006-05-051-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mov EAX, DWORD PTR [ESP + 4] mov ECX, DWORD PTR [EAX] mov EDX, ECX add EDX, EDX or EDX, ECX and EDX, -2147483648 and ECX, 2147483647 or EDX, ECX mov DWORD PTR [EAX], EDX ret instead of: sub ESP, 4 mov DWORD PTR [ESP], ESI mov EAX, DWORD PTR [ESP + 8] mov ECX, DWORD PTR [EAX] mov EDX, ECX add EDX, EDX mov ESI, ECX and ESI, -2147483648 and EDX, -2147483648 or EDX, ESI and ECX, 2147483647 or EDX, ECX mov DWORD PTR [EAX], EDX mov ESI, DWORD PTR [ESP] add ESP, 4 ret llvm-svn: 28122
* Implement a variety of simplifications for ANY_EXTEND.Chris Lattner2006-05-051-0/+51
| | | | llvm-svn: 28121
* Factor some code, add these transformations:Chris Lattner2006-05-051-55/+66
| | | | | | | | // fold (and (trunc x), (trunc y)) -> (trunc (and x, y)) // fold (or (trunc x), (trunc y)) -> (trunc (or x, y)) // fold (xor (trunc x), (trunc y)) -> (trunc (xor x, y)) llvm-svn: 28120
* Fix VC++ compilation error.Jeff Cohen2006-05-051-1/+1
| | | | llvm-svn: 28117
* Sink noop copies into the basic block that uses them. This reduces the numberChris Lattner2006-05-051-4/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | of cross-block live ranges, and allows the bb-at-a-time selector to always coallesce these away, at isel time. This reduces the load on the coallescer and register allocator. For example on a codec on X86, we went from: 1643 asm-printer - Number of machine instrs printed 419 liveintervals - Number of loads/stores folded into instructions 1144 liveintervals - Number of identity moves eliminated after coalescing 1022 liveintervals - Number of interval joins performed 282 liveintervals - Number of intervals after coalescing 1304 liveintervals - Number of original intervals 86 regalloc - Number of times we had to backtrack 1.90232 regalloc - Ratio of intervals processed over total intervals 40 spiller - Number of values reused 182 spiller - Number of loads added 121 spiller - Number of stores added 132 spiller - Number of register spills 6 twoaddressinstruction - Number of instructions commuted to coalesce 360 twoaddressinstruction - Number of two-address instructions to: 1636 asm-printer - Number of machine instrs printed 403 liveintervals - Number of loads/stores folded into instructions 1155 liveintervals - Number of identity moves eliminated after coalescing 1033 liveintervals - Number of interval joins performed 279 liveintervals - Number of intervals after coalescing 1312 liveintervals - Number of original intervals 76 regalloc - Number of times we had to backtrack 1.88998 regalloc - Ratio of intervals processed over total intervals 1 spiller - Number of copies elided 41 spiller - Number of values reused 191 spiller - Number of loads added 114 spiller - Number of stores added 128 spiller - Number of register spills 4 twoaddressinstruction - Number of instructions commuted to coalesce 356 twoaddressinstruction - Number of two-address instructions On this testcase, this change provides a modest reduction in spill code, regalloc iterations, and total instructions emitted. It increases the number of register coallesces. llvm-svn: 28115
* Final pass of minor cleanups for MachineInstrChris Lattner2006-05-041-4/+0
| | | | llvm-svn: 28110
* Initial support for register pressure aware scheduling. The register reductionEvan Cheng2006-05-041-50/+238
| | | | | | | | | | scheduler can go into a "vertical mode" (i.e. traversing up the two-address chain, etc.) when the register pressure is low. This does seem to reduce the number of spills in the cases I've looked at. But with x86, it's no guarantee the performance of the code improves. It can be turned on with -sched-vertically option. llvm-svn: 28108
* Remove redundancy and a level of indirection when creating machine operandsChris Lattner2006-05-041-21/+5
| | | | llvm-svn: 28107
* Remove and simplify some more machineinstr/machineoperand stuff.Chris Lattner2006-05-043-3/+3
| | | | llvm-svn: 28105
* Rename MO_VirtualRegister -> MO_Register. Clean up immediate handling.Chris Lattner2006-05-042-5/+5
| | | | llvm-svn: 28104
* Move some methods out of MachineInstr into MachineOperandChris Lattner2006-05-046-35/+16
| | | | llvm-svn: 28102
* There shalt be only one "immediate" operand type!Chris Lattner2006-05-041-8/+2
| | | | llvm-svn: 28099
* Change "value" in MachineOperand to be a GlobalValue, as that is the onlyChris Lattner2006-05-041-14/+3
| | | | | | thing that can be in it. Remove a dead method. llvm-svn: 28098
* Remove a bunch more dead V9 specific stuffChris Lattner2006-05-043-34/+9
| | | | llvm-svn: 28094
* Remove a bunch more SparcV9 specific stuffChris Lattner2006-05-042-12/+6
| | | | llvm-svn: 28093
* Remove some more V9-specific stuff.Chris Lattner2006-05-041-32/+2
| | | | llvm-svn: 28092
* Remove some more unused stuff from MachineInstr that was leftover from V9.Chris Lattner2006-05-041-38/+0
| | | | llvm-svn: 28091
* Suck block address tracking out of targets into the JIT Emitter. ThisChris Lattner2006-05-031-6/+9
| | | | | | | simplifies the MachineCodeEmitter interface just a little bit and makes BasicBlocks work like constant pools and jump tables. llvm-svn: 28082
* Finish up the initial jump table implementation by allowing jump tables toNate Begeman2006-05-031-26/+34
| | | | | | | not be 100% dense. Increase the minimum threshold for the number of cases in a switch statement from 4 to 6 in order to create a jump table. llvm-svn: 28079
* Bottom up register pressure reduction work: clean up some hacks and enhancedEvan Cheng2006-05-031-75/+72
| | | | | | | the heuristic to further reduce spills for several test cases. (Note, it may not necessarily translate to runtime win!) llvm-svn: 28076
* Refactor TargetMachine, pushing handling of TargetData into the ↵Owen Anderson2006-05-037-49/+49
| | | | | | | | target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference. This fixes PR 759. llvm-svn: 28074
* Change the BasicBlockAddrs map to be a vector, indexed by MBB number.Chris Lattner2006-05-031-1/+1
| | | | llvm-svn: 28069
* Several related changes:Chris Lattner2006-05-021-4/+6
| | | | | | | | | | | | | 1. Change several methods in the MachineCodeEmitter class to be pure virtual. 2. Suck emitConstantPool/initJumpTableInfo into startFunction, removing them from the MachineCodeEmitter interface, and reducing the amount of target- specific code. 3. Change the JITEmitter so that it allocates constantpools and jump tables *right* next to the functions that they belong to, instead of in a separate pool of memory. This makes all memory for a function be contiguous, and means the JITEmitter only tracks one block of memory now. llvm-svn: 28065
* Do not make the JIT memory manager manage the memory for globals. InsteadChris Lattner2006-05-021-4/+0
| | | | | | just have the JIT malloc them. llvm-svn: 28062
* Refactor the machine code emitter interface to pull the pointers for the currentChris Lattner2006-05-022-145/+7
| | | | | | | | | | code emission location into the base class, instead of being in the derived classes. This change means that low-level methods like emitByte/emitWord now are no longer virtual (yaay for speed), and we now have a framework to support growable code segments. This implements feature request #1 of PR469. llvm-svn: 28059
* Print function number instead of nameNate Begeman2006-05-021-3/+2
| | | | llvm-svn: 28057
* Remove dead methodChris Lattner2006-05-022-7/+0
| | | | llvm-svn: 28055
* Remove the debug machine code emitter. The "FilePrinterEmitter" is moreChris Lattner2006-05-021-52/+0
| | | | | | useful for debugging. llvm-svn: 28051
* Extend printBasicBlockLabel a bit so that it can be used to print allNate Begeman2006-05-021-3/+8
| | | | | | | basic block labels, consolidating the code to do so in one place for each target. llvm-svn: 28050
* De-virtualize SwitchSection.Jeff Cohen2006-05-021-10/+42
| | | | llvm-svn: 28047
* De-virtualize EmitZeroes.Jeff Cohen2006-05-021-3/+7
| | | | llvm-svn: 28046
* Make Intel syntax mode friendlier to Microsoft ML assembler (still needs ↵Jeff Cohen2006-05-021-10/+16
| | | | | | more work). llvm-svn: 28044
* Fix a latent bug that my spiller patch last week exposed: we were leavingChris Lattner2006-05-012-4/+7
| | | | | | | | | instructions in the virtregfolded map that were deleted. Because they were deleted, newly allocated instructions could end up at the same address, magically finding themselves in the map. The solution is to remove entries from the map when we delete the instructions. llvm-svn: 28041
* When promoting a load to a reg-reg copy, where the load was a previousChris Lattner2006-05-011-0/+1
| | | | | | | instruction folded with spill code, make sure the remove the load from the virt reg folded map. llvm-svn: 28040
* Remove previous patch, which wasn't quite right.Chris Lattner2006-05-013-24/+23
| | | | llvm-svn: 28039
* Dis-favor stores moreEvan Cheng2006-05-011-2/+2
| | | | llvm-svn: 28035
* Bottom up register-pressure reduction scheduler now pushes store operationsEvan Cheng2006-05-011-17/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | up the schedule. This helps code that looks like this: loads ... computations (first set) ... stores (first set) ... loads computations (seccond set) ... stores (seccond set) ... Without this change, the stores and computations are more likely to interleave: loads ... loads ... computations (first set) ... computations (second set) ... computations (first set) ... stores (first set) ... computations (second set) ... stores (stores set) ... This can increase the number of spills if we are unlucky. llvm-svn: 28033
* Didn't mean ScheduleDAGList.cpp to make the last checkin.Evan Cheng2006-05-011-33/+17
| | | | llvm-svn: 28030
* Remove temp. option -spiller-check-liveout, it didn't cause any failure nor ↵Evan Cheng2006-05-012-22/+34
| | | | | | performance regressions. llvm-svn: 28029
* Format #APP lines a bit nicerChris Lattner2006-05-011-2/+2
| | | | llvm-svn: 28026
* Local spiller kills a store if the folded restore is turned into a copy.Evan Cheng2006-04-303-10/+21
| | | | | | | | But this is incorrect if the spilled value live range extends beyond the current BB. It is currently controlled by a temporary option -spiller-check-liveout. llvm-svn: 28024
* Remove a bogus transformation. This fixes ↵Chris Lattner2006-04-281-7/+0
| | | | | | | | SingleSource/UnitTests/2006-01-23-InitializedBitField.c with some changes I have to the new CFE. llvm-svn: 28022
* Remove the temporary option: -no-isel-fold-inflightEvan Cheng2006-04-281-11/+0
| | | | llvm-svn: 28012
* TargetLowering::LowerArguments should return a VBIT_CONVERT ofEvan Cheng2006-04-281-16/+14
| | | | | | FORMAL_ARGUMENTS SDOperand in the return result vector. llvm-svn: 28009
* Mapping of physregs can make it so that the designated and input physregs areChris Lattner2006-04-281-0/+13
| | | | | | the same. In this case, don't emit a noop copy. llvm-svn: 28008
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