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authorChris Lattner <sabre@nondot.org>2006-04-28 04:43:18 +0000
committerChris Lattner <sabre@nondot.org>2006-04-28 04:43:18 +0000
commit79c50d96c9ff3f9eb24a1db130e95c1c1672319f (patch)
tree42db299ec3ff1a1ca96472e7b1d1342aab7aa9ad /llvm/lib/CodeGen
parente63d808b6e027272e4f40252fccb2543889e18b0 (diff)
downloadbcm5719-llvm-79c50d96c9ff3f9eb24a1db130e95c1c1672319f.tar.gz
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Mapping of physregs can make it so that the designated and input physregs are
the same. In this case, don't emit a noop copy. llvm-svn: 28008
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r--llvm/lib/CodeGen/VirtRegMap.cpp13
1 files changed, 13 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/VirtRegMap.cpp b/llvm/lib/CodeGen/VirtRegMap.cpp
index b30c61c8382..f0dd40d1e16 100644
--- a/llvm/lib/CodeGen/VirtRegMap.cpp
+++ b/llvm/lib/CodeGen/VirtRegMap.cpp
@@ -611,6 +611,19 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM) {
DesignatedReg = ReusedOperands.GetRegForReload(DesignatedReg, &MI,
Spills, MaybeDeadStores);
+ // If the mapped designated register is actually the physreg we have
+ // incoming, we don't need to inserted a dead copy.
+ if (DesignatedReg == PhysReg) {
+ // If this stack slot value is already available, reuse it!
+ DEBUG(std::cerr << "Reusing SS#" << StackSlot << " from physreg "
+ << MRI->getName(PhysReg) << " for vreg"
+ << VirtReg
+ << " instead of reloading into same physreg.\n");
+ MI.SetMachineOperandReg(i, PhysReg);
+ ++NumReused;
+ continue;
+ }
+
const TargetRegisterClass* RC =
MBB.getParent()->getSSARegMap()->getRegClass(VirtReg);
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