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path: root/llvm/lib/CodeGen/TargetPassConfig.cpp
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* [CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use wa...Eugene Zelenko2017-06-261-14/+22
* CodeGen/LLVMTargetMachine: Refactor ISel pass construction; NFCIMatthias Braun2017-06-061-0/+71
* TargetMachine: Indicate whether machine verifier passes.Matthias Braun2017-05-311-1/+6
* TargetPassConfig: Keep a reference to an LLVMTargetMachine; NFCMatthias Braun2017-05-301-5/+5
* [LegacyPassManager] Remove TargetMachine constructorsFrancis Visoiu Mistrih2017-05-181-8/+10
* Only enable LiveRangeShrink for x86.Dehao Chen2017-05-171-3/+0
* Make sure -optimize-regalloc=false is used correctly by user.Jonas Paulsson2017-05-171-10/+14
* [X86] Relocate code of replacement of subtarget unsupported masked memory int...Ayman Musa2017-05-151-0/+5
* Add LiveRangeShrink pass to shrink live range within BB.Dehao Chen2017-05-121-0/+3
* Add a late IR expansion pass for the experimental reduction intrinsics.Amara Emerson2017-05-101-0/+3
* Allow targets to opt-in to codegen in SCC orderMatt Arsenault2017-04-041-2/+6
* [Outliner] Fixed Asan bot failure in r296418Jessica Paquette2017-03-061-0/+6
* [GlobalISel] Add a way for targets to enable GISel.Ahmed Bougacha2017-03-011-0/+5
* Improve scheduling with branch coalescingNemanja Ivanovic2017-03-011-0/+4
* Revert "Add MIR-level outlining pass"Matthias Braun2017-02-281-6/+0
* Add MIR-level outlining passMatthias Braun2017-02-281-0/+6
* Revamp llvm::once_flag to be closer to std::once_flagKamil Rytarowski2017-02-051-1/+1
* [X86] Implement -mfentryNirav Dave2017-01-311-0/+3
* TargetPassConfig: Rename DisablePostRA -> DisablePostRASched; NFCMatthias Braun2016-12-081-3/+3
* TargetPassConfig: Move addPass of IPRA RegUsageInfoProp down.Matthias Braun2016-10-281-3/+3
* Turn cl::values() (for enum) from a vararg function to using C++ variadic tem...Mehdi Amini2016-10-081-2/+1
* llc: Add -start-before/-stop-before optionsMatthias Braun2016-09-231-2/+3
* Add a counter-function insertion passHal Finkel2016-09-011-0/+3
* [TargetPassConfig] Add a hook to tell whether GlobalISel should warm on fallb...Quentin Colombet2016-08-311-4/+10
* [TargetPassConfig] Add a target hook to know what GlobalISel should do on error.Quentin Colombet2016-08-261-0/+13
* (Trivial) TargetPassConfig: assert when TargetMachine has no MCAsmInfoAlex Bradbury2016-08-181-1/+3
* Replace "fallthrough" comments with LLVM_FALLTHROUGHJustin Bogner2016-08-171-1/+1
* XRay: Add entry and exit sledsDean Michael Berris2016-07-141-0/+1
* Add EnableIPRA to TargetOptions, and move the cl::opt -enable-ipra to TargetM...Mehdi Amini2016-07-131-7/+3
* [IPRA] Set callee saved registers to none for local function when IPRA is ena...Mehdi Amini2016-07-131-1/+0
* [CodeGen, TargetPassConfig] Remove a race from createRegAllocPassDavid Majnemer2016-07-081-6/+14
* [CFLAA] Split into Anders+Steens analysis.George Burgess IV2016-07-061-6/+30
* Interprocedural Register Allocation (IPRA): add a Transformation PassMehdi Amini2016-06-101-0/+3
* Interprocedural Register Allocation (IPRA) AnalysisMehdi Amini2016-06-101-0/+15
* CodeGen: Allow verifier to run after MachineBlockPlacementMatt Arsenault2016-06-091-1/+1
* CodeGen: Refactor renameDisconnectedComponents() as a passMatthias Braun2016-05-311-0/+5
* Factor PrologEpilogInserter around spilling, frame finalization, and scavengingDerek Schuff2016-05-171-1/+11
* TargetPassConfig: Set PrintMachineCode even if addMachinePasses() does not run.Matthias Braun2016-05-101-5/+5
* CodeGen: Move TargetPassConfig from Passes.h to an own header; NFCMatthias Braun2016-05-101-0/+827
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