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authorMatthias Braun <matze@braunis.de>2016-05-31 22:38:06 +0000
committerMatthias Braun <matze@braunis.de>2016-05-31 22:38:06 +0000
commitf9acacaa928d7ba9db900c42893c244fb19714c4 (patch)
tree7a44766e0781f8f4342fb62db6a84f38009bd976 /llvm/lib/CodeGen/TargetPassConfig.cpp
parentcbb1d06ff2476e01a66908bcfdfa6058c5a4bfbd (diff)
downloadbcm5719-llvm-f9acacaa928d7ba9db900c42893c244fb19714c4.tar.gz
bcm5719-llvm-f9acacaa928d7ba9db900c42893c244fb19714c4.zip
CodeGen: Refactor renameDisconnectedComponents() as a pass
Refactor LiveIntervals::renameDisconnectedComponents() to be a pass. Also change the name to "RenameIndependentSubregs": - renameDisconnectedComponents() worked on a MachineFunction at a time so it is a natural candidate for a machine function pass. - The algorithm is testable with a .mir test now. - This also fixes a problem where the lazy renaming as part of the MachineScheduler introduced IMPLICIT_DEF instructions after the number of a nodes in a region were counted leading to a mismatch. Differential Revision: http://reviews.llvm.org/D20507 llvm-svn: 271345
Diffstat (limited to 'llvm/lib/CodeGen/TargetPassConfig.cpp')
-rw-r--r--llvm/lib/CodeGen/TargetPassConfig.cpp5
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/TargetPassConfig.cpp b/llvm/lib/CodeGen/TargetPassConfig.cpp
index 4aebf76d779..a62ebadcb7f 100644
--- a/llvm/lib/CodeGen/TargetPassConfig.cpp
+++ b/llvm/lib/CodeGen/TargetPassConfig.cpp
@@ -775,6 +775,11 @@ void TargetPassConfig::addOptimizedRegAlloc(FunctionPass *RegAllocPass) {
addPass(&TwoAddressInstructionPassID, false);
addPass(&RegisterCoalescerID);
+ // The machine scheduler may accidentally create disconnected components
+ // when moving subregister definitions around, avoid this by splitting them to
+ // separate vregs before. Splitting can also improve reg. allocation quality.
+ addPass(&RenameIndependentSubregsID);
+
// PreRA instruction scheduling.
addPass(&MachineSchedulerID);
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