| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [CodeGen, TargetPassConfig] Remove a race from createRegAllocPass | David Majnemer | 2016-07-08 | 1 | -6/+14 |
| * | [CFLAA] Split into Anders+Steens analysis. | George Burgess IV | 2016-07-06 | 1 | -6/+30 |
| * | Interprocedural Register Allocation (IPRA): add a Transformation Pass | Mehdi Amini | 2016-06-10 | 1 | -0/+3 |
| * | Interprocedural Register Allocation (IPRA) Analysis | Mehdi Amini | 2016-06-10 | 1 | -0/+15 |
| * | CodeGen: Allow verifier to run after MachineBlockPlacement | Matt Arsenault | 2016-06-09 | 1 | -1/+1 |
| * | CodeGen: Refactor renameDisconnectedComponents() as a pass | Matthias Braun | 2016-05-31 | 1 | -0/+5 |
| * | Factor PrologEpilogInserter around spilling, frame finalization, and scavenging | Derek Schuff | 2016-05-17 | 1 | -1/+11 |
| * | TargetPassConfig: Set PrintMachineCode even if addMachinePasses() does not run. | Matthias Braun | 2016-05-10 | 1 | -5/+5 |
| * | CodeGen: Move TargetPassConfig from Passes.h to an own header; NFC | Matthias Braun | 2016-05-10 | 1 | -0/+827 |
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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