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* Use the proper type for shift counts. This fixes a bootstrap error.Dan Gohman2010-07-231-1/+4
| | | | llvm-svn: 109265
* DAGCombine (shl (anyext x, c)) to (anyext (shl x, c)) if the high bitsDan Gohman2010-07-231-1/+21
| | | | | | are not demanded. This often allows the anyext to be folded away. llvm-svn: 109242
* Teach bottom up pre-ra scheduler to track register pressure. Work in progress.Evan Cheng2010-07-211-7/+13
| | | | llvm-svn: 108991
* ARM has to provide its own TargetLowering::findRepresentativeClass because ↵Evan Cheng2010-07-191-6/+7
| | | | | | its scalar floating point registers alias its vector registers. llvm-svn: 108761
* Teach computeRegisterProperties() to compute "representative" register class ↵Evan Cheng2010-07-191-0/+52
| | | | | | | | for legal value types. A "representative" register class is the largest legal super-reg register class for a value type. e.g. On i386, GR32 is the rep register class for i8 / i16 / i32; on x86_64 it would be GR64. This property will be used by the register pressure tracking instruction scheduler. llvm-svn: 108735
* Fix crash reported in PR7653.Devang Patel2010-07-151-1/+1
| | | | llvm-svn: 108441
* Fix va_arg for doubles. With this patch VAARG nodes always contain theRafael Espindola2010-07-111-0/+1
| | | | | | | | | | | | | | | correct alignment information, which simplifies ExpandRes_VAARG a bit. The patch introduces a new alignment information to TargetLoweringInfo. This is needed since the two natural candidates cannot be used: * The 's' in target data: If this is set to the minimal alignment of any argument, getCallFrameTypeAlignment would return 4 for doubles on ARM for example. * The getTransientStackAlignment method. It is possible for an architecture to have argument less aligned than what we maintain the stack pointer. llvm-svn: 108072
* Reapply bottom-up fast-isel, with several fixes for x86-32:Dan Gohman2010-07-101-0/+60
| | | | | | | | | - Check getBytesToPopOnReturn(). - Eschew ST0 and ST1 for return values. - Fix the PIC base register initialization so that it doesn't ever fail to end up the top of the entry block. llvm-svn: 108039
* --- Reverse-merging r107947 into '.':Bob Wilson2010-07-091-60/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | U utils/TableGen/FastISelEmitter.cpp --- Reverse-merging r107943 into '.': U test/CodeGen/X86/fast-isel.ll U test/CodeGen/X86/fast-isel-loads.ll U include/llvm/Target/TargetLowering.h U include/llvm/Support/PassNameParser.h U include/llvm/CodeGen/FunctionLoweringInfo.h U include/llvm/CodeGen/CallingConvLower.h U include/llvm/CodeGen/FastISel.h U include/llvm/CodeGen/SelectionDAGISel.h U lib/CodeGen/LLVMTargetMachine.cpp U lib/CodeGen/CallingConvLower.cpp U lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp U lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp U lib/CodeGen/SelectionDAG/FastISel.cpp U lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp U lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp U lib/CodeGen/SelectionDAG/InstrEmitter.cpp U lib/CodeGen/SelectionDAG/TargetLowering.cpp U lib/Target/XCore/XCoreISelLowering.cpp U lib/Target/XCore/XCoreISelLowering.h U lib/Target/X86/X86ISelLowering.cpp U lib/Target/X86/X86FastISel.cpp U lib/Target/X86/X86ISelLowering.h llvm-svn: 107987
* Re-apply bottom-up fast-isel, with fixes. Be very careful to avoid emittingDan Gohman2010-07-091-0/+60
| | | | | | a DBG_VALUE after a terminator, or emitting any instructions before an EH_LABEL. llvm-svn: 107943
* Revert 107840 107839 107813 107804 107800 107797 107791.Dan Gohman2010-07-081-60/+0
| | | | | | Debug info intrinsics win for now. llvm-svn: 107850
* Add X86FastISel support for return statements. This entails refactoringDan Gohman2010-07-071-0/+60
| | | | | | | a bunch of stuff, to allow the target-independent calling convention logic to be employed. llvm-svn: 107800
* Propagate debug loc.Devang Patel2010-07-061-1/+2
| | | | llvm-svn: 107710
* more tidying.Chris Lattner2010-07-051-8/+4
| | | | llvm-svn: 107615
* random tidyingChris Lattner2010-07-051-35/+35
| | | | llvm-svn: 107612
* In asm's, output operands with matching input constraintsDale Johannesen2010-06-281-2/+7
| | | | | | | | have to be registers, per gcc documentation. This affects the logic for determining what "g" should lower to. PR 7393. A couple of existing testcases are affected. llvm-svn: 107079
* Change if-conversion block size limit checks to add some flexibility.Evan Cheng2010-06-251-2/+0
| | | | llvm-svn: 106901
* The hasMemory argument is irrelevant to how the argumentDale Johannesen2010-06-251-5/+3
| | | | | | | | | for an "i" constraint should get lowered; PR 6309. While this argument was passed around a lot, this is the only place it was used, so it goes away from a lot of other places. llvm-svn: 106893
* Reapply r106634, now that the bug it exposed is fixed.Dan Gohman2010-06-241-4/+4
| | | | llvm-svn: 106746
* Revert r106263, "Fold the ShrinkDemandedOps pass into the regular ↵Daniel Dunbar2010-06-231-4/+4
| | | | | | DAGCombiner pass,"... it was causing both 'file' (with clang) and 176.gcc (with llvm-gcc) to be miscompiled. llvm-svn: 106634
* Some targets don't require the fencing MEMBARRIER instructions surroundingJim Grosbach2010-06-231-0/+1
| | | | | | | | atomic intrinsics, either because the use locking instructions for the atomics, or because they perform the locking directly. Add support in the DAG combiner to fold away the fences. llvm-svn: 106630
* back-end libcall handling for ATOMIC_SWAP (__sync_lock_test_and_set)Jim Grosbach2010-06-181-0/+4
| | | | llvm-svn: 106342
* Add Expand-to-libcall support for additional atomics. This covers the usualJim Grosbach2010-06-181-0/+28
| | | | | | | | | | entries used by llvm-gcc. *_[U]MIN and such can be added later if needed. This enables the front ends to simplify handling of the atomic intrinsics by removing the target-specific decision about which targets can handle the intrinsics. llvm-svn: 106321
* Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass,Dan Gohman2010-06-181-4/+4
| | | | | | which is faster, simpler, and less surprising. llvm-svn: 106263
* Fix SimplifyDemandedBits' AssertZext logic to demand all the bits. ItDan Gohman2010-06-031-4/+8
| | | | | | needs to demand the high bits because it's asserting that they're zero. llvm-svn: 105406
* Code refactoring: pull SchedPreference enum from TargetLowering.h to ↵Evan Cheng2010-05-191-1/+1
| | | | | | TargetMachine.h and put it in its own namespace. llvm-svn: 104147
* Trim #includes and forward declarations.Dan Gohman2010-05-111-1/+0
| | | | llvm-svn: 103489
* Fixes for Microsoft Visual Studio 2010, from Steven Watanabe!Douglas Gregor2010-05-111-2/+2
| | | | llvm-svn: 103457
* Insert ANY_EXTEND node instead of invalid truncate during DAG Combining (X & 1),Anton Korobeynikov2010-05-011-1/+6
| | | | | | when needed. This fixes PR7001 llvm-svn: 102838
* Add more const qualifiers on TargetMachine and friends.Dan Gohman2010-04-211-1/+2
| | | | llvm-svn: 101977
* Because of the EMMS problem, right now we have to supportDale Johannesen2010-04-201-1/+1
| | | | | | | | | | | user-defined operations that use MMX register types, but the compiler shouldn't generate them on its own. This adds a Synthesizable abstraction to represent this, and changes the vector widening computation so it won't produce MMX types. (The motivation is to remove noise from the ABI compatibility part of the gcc test suite, which has some breakage right now.) llvm-svn: 101951
* More work to allow dag combiner to promote 16-bit ops to 32-bit.Evan Cheng2010-04-171-19/+26
| | | | llvm-svn: 101621
* Add const qualifiers to CodeGen's use of LLVM IR constructs.Dan Gohman2010-04-151-1/+1
| | | | llvm-svn: 101334
* Add few missed libcalls and correct names for others.Anton Korobeynikov2010-03-261-4/+16
| | | | llvm-svn: 99656
* Remove the ConvertActions table and associated code, which is unused.Dan Gohman2010-03-241-1/+0
| | | | llvm-svn: 99372
* Turn calls to copysignl into an FCOPYSIGN node. Handle FCOPYSIGN nodesDuncan Sands2010-03-141-0/+4
| | | | | | | with ppc_f128 type by having the type legalizer turn these back into a call to copysignl. llvm-svn: 98514
* Make default expansion for FP16 <-> FP32 nodes into libcallsAnton Korobeynikov2010-03-141-0/+4
| | | | llvm-svn: 98501
* Remove getWidenVectorType, which is no longer used.Dan Gohman2010-03-111-14/+0
| | | | llvm-svn: 98289
* Fix several places to handle vector operands properly.Dan Gohman2010-03-021-1/+1
| | | | | | Based on a patch by Micah Villmow for PR6438. llvm-svn: 97538
* Fix optimization of ISD::TRUNCATE on vector operands. Based on a patchDan Gohman2010-03-011-4/+5
| | | | | | by Micah Villmow for PR6335. llvm-svn: 97461
* Re-apply 97040 with fix. This survives a ppc self-host llvm-gcc bootstrap.Evan Cheng2010-02-271-7/+33
| | | | llvm-svn: 97310
* Speculatively revert r97011, "Re-apply 96540 and 96556 with fixes.", again inDaniel Dunbar2010-02-241-33/+7
| | | | | | the hopes of fixing PPC bootstrap. llvm-svn: 97040
* Re-apply 96540 and 96556 with fixes.Evan Cheng2010-02-241-7/+33
| | | | llvm-svn: 97011
* Revert commits 96556 and 96640, because commit 96556 breaks theDuncan Sands2010-02-191-30/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dragonegg self-host build. I reverted 96640 in order to revert 96556 (96640 goes on top of 96556), but it also looks like with both of them applied the breakage happens even earlier. The symptom of the 96556 miscompile is the following crash: llvm[3]: Compiling AlphaISelLowering.cpp for Release build cc1plus: /home/duncan/tmp/tmp/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:4982: void llvm::SelectionDAG::ReplaceAllUsesWith(llvm::SDNode*, llvm::SDNode*, llvm::SelectionDAG::DAGUpdateListener*): Assertion `(!From->hasAnyUseOfValue(i) || From->getValueType(i) == To->getValueType(i)) && "Cannot use this version of ReplaceAllUsesWith!"' failed. Stack dump: 0. Running pass 'X86 DAG->DAG Instruction Selection' on function '@_ZN4llvm19AlphaTargetLowering14LowerOperationENS_7SDValueERNS_12SelectionDAGE' g++: Internal error: Aborted (program cc1plus) This occurs when building LLVM using LLVM built by LLVM (via dragonegg). Probably LLVM has miscompiled itself, though it may have miscompiled GCC and/or dragonegg itself: at this point of the self-host build, all of GCC, LLVM and dragonegg were built using LLVM. Unfortunately this kind of thing is extremely hard to debug, and while I did rummage around a bit I didn't find any smoking guns, aka obviously miscompiled code. Found by bisection. r96556 | evancheng | 2010-02-18 03:13:50 +0100 (Thu, 18 Feb 2010) | 5 lines Some dag combiner goodness: Transform br (xor (x, y)) -> br (x != y) Transform br (xor (xor (x,y), 1)) -> br (x == y) Also normalize (and (X, 1) == / != 1 -> (and (X, 1)) != / == 0 to match to "test on x86" and "tst on arm" r96640 | evancheng | 2010-02-19 01:34:39 +0100 (Fri, 19 Feb 2010) | 16 lines Transform (xor (setcc), (setcc)) == / != 1 to (xor (setcc), (setcc)) != / == 1. e.g. On x86_64 %0 = icmp eq i32 %x, 0 %1 = icmp eq i32 %y, 0 %2 = xor i1 %1, %0 br i1 %2, label %bb, label %return => testl %edi, %edi sete %al testl %esi, %esi sete %cl cmpb %al, %cl je LBB1_2 llvm-svn: 96672
* Transform (xor (setcc), (setcc)) == / != 1 toEvan Cheng2010-02-191-3/+13
| | | | | | | | | | | | | | | | | | | (xor (setcc), (setcc)) != / == 1. e.g. On x86_64 %0 = icmp eq i32 %x, 0 %1 = icmp eq i32 %y, 0 %2 = xor i1 %1, %0 br i1 %2, label %bb, label %return => testl %edi, %edi sete %al testl %esi, %esi sete %cl cmpb %al, %cl je LBB1_2 llvm-svn: 96640
* Some dag combiner goodness:Evan Cheng2010-02-181-4/+20
| | | | | | | | Transform br (xor (x, y)) -> br (x != y) Transform br (xor (xor (x,y), 1)) -> br (x == y) Also normalize (and (X, 1) == / != 1 -> (and (X, 1)) != / == 0 to match to "test on x86" and "tst on arm" llvm-svn: 96556
* Add non-temporal flags and remove an assumption of default arguments.David Greene2010-02-151-1/+1
| | | | llvm-svn: 96240
* The previous fix of widening divides that trap was too fragile as it depends ↵Mon P Wang2010-02-101-0/+18
| | | | | | | | | | | on custom lowering and requires that certain types exist in ValueTypes.h. Modified widening to check if an op can trap and if so, the widening algorithm will apply only the op on the defined elements. It is safer to do this in widening because the optimizer can't guarantee removing unused ops in some cases. llvm-svn: 95823
* Fix "the the" and similar typos.Dan Gohman2010-02-101-1/+1
| | | | llvm-svn: 95781
* eliminate the TargetLowering::UsesGlobalOffsetTable bool, which isChris Lattner2010-01-261-3/+2
| | | | | | | subsumed by TargetLowering::getJumpTableEncoding(). Change uses of it to be more specific. llvm-svn: 94529
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